[OpenWrt Wiki] Xiaomi Redmi AX6000 (2024)

First, you'll need to grab a vulnerable software version. The table below shows known vulnerable versions. It is recommended to install version 1.0.48.

To downgrade: navigate to the upload firmware page and select the appropriate software version. It will complain about the downgrade. Edit the url and change the <html>0</html> at the end to a <html>1</html> and press enter. Or change to <html>2</html> if there is already <html>1</html> (seen on v1.0.64). The downgrade will proceed.

You'll see references to a {token} variable in many of the following commands. To get it, sign into the web UI of your router and look for stok=<some hex value> in the URL. This is the token. It will change after each reboot so you will need to get it after each one.

OEM UI is only in Chinese. A quick startup (tested in verion 1.0.48) would be:

From direct connected LAN port (address will be assigned by AX6000 using DHCP), access http://192.168.31.1/ portal and follow these steps (one per page):

  1. Remove second tick and click blue button

  2. Click last hyperlink below blue button

  3. Select DHCP arrow

  4. Type WiFi password (8 chars min). It'll be used for login, so make it simple. Uncheck middle tick and click blue button

  5. Go to the web UI at http://192.168.31.1/

  6. Type WiFi password (as above) in box for access.

Now you can find stok= token in URL. Repeat last two steps after each reboot to get the new one.

A computer (preferably Linux) must be connected to the router via an ethernet LAN port (one of the 3 ports in the middle).

1. Once you've gained access to OEM system, check current stock system

cat /proc/cmdline

Sample OUTPUT:

console=ttyS0,115200n1 loglevel=8 firmware=1 uart_en=1

if firmware=1, current system is ubi1

if firmware=0, current system is ubi0

2. Setup nvramif current system is ubi1, please setup: next time it would boot from ubi

nvram set boot_wait=onnvram set uart_en=1nvram set flag_boot_rootfs=0nvram set flag_last_success=0nvram set flag_boot_success=1nvram set flag_try_sys1_failed=0nvram set flag_try_sys2_failed=0nvram commit

else if current system is ubi, please setup: next time it would boot from ubi1

nvram set boot_wait=onnvram set uart_en=1nvram set flag_boot_rootfs=1nvram set flag_last_success=1nvram set flag_boot_success=1nvram set flag_try_sys1_failed=0nvram set flag_try_sys2_failed=0nvram commit

3. Flash flash initramfs-factory.ubiif firmware=1, current system is ubi1, flash to ubi:

ubiformat /dev/mtd8 -y -f /tmp/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-stock-initramfs-factory.ubi

if firmware=0, current system is ubi, flash to ubi1:

ubiformat /dev/mtd9 -y -f /tmp/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-stock-initramfs-factory.ubi

NOTE: If you want to go directly to the ubootmod version and you know what you're doing (high risk of bricking) you can use ubootmod initramfs version here and jump directly to step 4 of ubootmod installation instructions below. Backup of system partitions (step 2 below) is always recommended.

NOTE: Firmware could be found at https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-stock-initramfs-factory.ubi

4. Reboot and setup uboot-env

It should boot to the openwrt initramfs system now, login ssh and setup:

fw_setenv boot_wait onfw_setenv uart_en 1fw_setenv flag_boot_rootfs 0fw_setenv flag_last_success 1fw_setenv flag_boot_success 1fw_setenv flag_try_sys1_failed 8fw_setenv flag_try_sys2_failed 8fw_setenv mtdparts "nmbm0:1024k(bl2),256k(Nvram),256k(Bdata),2048k(factory),2048k(fip),256k(crash),256k(crash_log),30720k(ubi),30720k(ubi1),51200k(overlay)"

here set flag_last_success=1 and flag_try_sys1_failed >= 6 and flag_try_sys1_failed >=6, to make it always boot from system 0

5. Flash sysupgrade.bin via sysupgrade

sysupgrade -n /tmp/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-stock-squashfs-sysupgrade.bin,

OpenWrt (stock layout) will be ready.

If you want to stay in this layout, you're done. If you want to move to ubootmod layout, keep reading.

1. Your device should already running OpenWrt (stock layout) as per above instructions

2. Backup BL2, Nvram, Bdata, Factory and FIP in case you break something or you want to go back to stock firmware one day.

cat /dev/mtdblock0 > /tmp/BL2.bincat /dev/mtdblock1 > /tmp/Nvram.bincat /dev/mtdblock2 > /tmp/Bdata.bincat /dev/mtdblock3 > /tmp/Factory.bincat /dev/mtdblock4 > /tmp/FIP.bin

And save all whose bin files to somewhere safe.

Then backup your configurations, since ubiformat for entire mtd device is required to create new ubootenv volume for OpenWrt U-Boot.

See Also
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3. Run the following cmd to boot into an initramfs with the new OpenWrt U-Boot layout that expand ubi partion to the end of flash:

ubiformat /dev/mtd7 -y -f /tmp/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-initramfs-factory.ubi

NOTE: The firmware could be found at https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-initramfs-factory.ubi

4. Reboot. It'll boot into initramfs, check mtd partion info.

The ubi partion should be mtd5

root@OpenWrt:~# cat /proc/mtddev: size erasesize namemtd0: 00100000 00020000 BL2mtd1: 00040000 00020000 Nvrammtd2: 00040000 00020000 Bdatamtd3: 00200000 00020000 Factorymtd4: 00200000 00020000 FIPmtd5: 07a80000 00020000 ubi

5. Load kmod-mtd-rw to temporarily make the bootloader partitions writable.

The kmod-mtd-rw is from the feeds, it is not packed in initramfs-factory by default.

If you're building your own image, remember to add kmod-mtd-rw module in Kernel modules > Other modules

To install kmod-mtd-rw via opkg:

opkg update && opkg install kmod-mtd-rw

Or, download kmod-mtd-rw.ipk from OpenWrt server and install it manuallye.g:https://downloads.openwrt.org/snapshots/targets/mediatek/filogic/kmods/

Select your OpenWrt release version and kernel version accordingly.

Load kmod-mtd-rw:

insmod /lib/modules/$(uname -r)/mtd-rw.ko i_want_a_brick=1

6. Run the following cmd to clean all pending crash dumps in pstore,or OpenWrt U-Boot may boot into NAND recovery or tftp recovery.

rm -f /sys/fs/pstore/*

7. Format ubi and create new ubootenv volume:

ubidetach -p /dev/mtd5; ubiformat /dev/mtd5 -y; ubiattach -p /dev/mtd5ubimkvol /dev/ubi0 -n 0 -N ubootenv -s 128KiBubimkvol /dev/ubi0 -n 1 -N ubootenv2 -s 128KiB

8. This is optional. Skip this if you do not want to have NAND recoveryboot feature offered by OpenWrt U-Boot. Don't worry, you always haveautomatic tftp recovery feature enabled.

If your recovery image is larger than 10MiB, size the recovery partition accordingly to make it fit.

ubimkvol /dev/ubi0 -n 2 -N recovery -s 10MiBubiupdatevol /dev/ubi0_2 /tmp/ax6000-ubootmod-initramfs-recovery.itb

NOTE: The file could be found at https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-initramfs-recovery.itb

9. Now, flash new U-Boot. Bye-bye ugly stock U-Boot.

mtd write /tmp/ax6000-ubootmod-preloader.bin BL2mtd write /tmp/ax6000-ubootmod-bl31-uboot.fip FIP

NOTE: The files could be found at https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-bl31-uboot.fip and https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-preloader.bin

10. Flash the squashfs-sysupgrade.bin as usual:

sysupgrade -n /tmp/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-squashfs-sysupgrade.itb

NOTE: The file could be found at https://downloads.openwrt.org/releases/{version}/targets/mediatek/filogic/openwrt-{version}-mediatek-filogic-xiaomi_redmi-router-ax6000-ubootmod-squashfs-sysupgrade.itb

Flash layout running OEM & OpenWrt stock Firmwares

dev start end size erasesize name size
mtd0 00000000 00100000 00100000 00020000 BL2 1MiB
mtd1 00100000 00140000 00040000 00020000 Nvram 256KiB
mtd2 00140000 00180000 00040000 00020000 Bdata 256KiB
mtd3 00180000 00380000 00200000 00020000 Factory 2MiB
mtd4 00380000 00580000 00200000 00020000 FIP 2MiB
mtd5 00580000 005c0000 00040000 00020000 crash 256KiB
mtd6 005c0000 00600000 00040000 00020000 crash_log 256KiB
mtd7 00600000 02400000 01E00000 00020000 ubi 30MiB
mtd8 02400000 04200000 01E00000 00020000 ubi1 30MiB
mtd9 04200000 07400000 03200000 00020000 overlay 50MiB

Flash layout running OpenWrt ubootmod Firmware

dev start end size erasesize name size
mtd0 00000000 00100000 00100000 00020000 BL2 1MiB
mtd1 00100000 00140000 00040000 00020000 Nvram 256KiB
mtd2 00140000 00180000 00040000 00020000 Bdata 256KiB
mtd3 00180000 00380000 00200000 00020000 Factory 2MiB
mtd4 00380000 00580000 00200000 00020000 FIP 2MiB
mtd5 00580000 08000000 07A80000 00020000 ubi 122MiB

[OpenWrt Wiki] Xiaomi Redmi AX6000 (1) The instructions below are for Broadcom devices and only serve as an example.
Remove / modify them if they do not apply to this particular device!

This section deals with

  • How you install OpenWrt from a device freshly opened

  • The steps required such as reset to factory defaults if the device has already been configured

Note: Reset router to factory defaults if it has been previously configured.

  • Browse to http://192.168.1.1/Upgrade.asp

  • Upload .bin file to router

  • Wait for it to reboot

  • Telnet to 192.168.1.1 and set a root password, or browse to http://192.168.1.1 if LuCI is installed.

→ generic.flashing.tftp

Redmi AX6000 can be recovered from a soft-brick with TFTP. The flow is:

  • The router boots and asks for an IP address on the LAN ports via DHCP

  • The TFTP server assigns an IP address to the router

  • The router then connects to the TFTP server (where your DHCP server listen, e.g.: 192.168.31.100) and tries to download a file named with the IP address given by the DHCP server converted to hexadecimal.

Because of this quirk we will have to configure the tftp server to assign only one IP and we will set the file name to the only IP address it can receive.

For Windows you can use tftpd64 and on Linux you can use dnsmasq.These are the steps to do it for Linux (this can be adapted to the tftpd64's graphical interface very easily):

  • Create a folder somewhere to place your firmware for the tftp server and download the OEM firmware (the file name is a very important part; depending on the previously installed Xiaomi firmware version, you may need to adjust the name of the .img file to a different one. The router will be looking for a specific file name on the tftp server – if the requested file in the terminal does not match the one you have in the tmp folder, rename it accordingly and proceed again):

    mkdir -p /tmp/tftpwget https://cdn.cnbj1.fds.api.mi-img.com/xiaoqiang/rom/rb06/miwifi_rb06_firmware_847e9_1.0.48.bin -O /tmp/tftp/C0A81F02.img

  • To ensure that the TFTP server has access to the firmware, set the privileges:

    sudo chmod -R 755 /tmp/tftpsudo chown -R nobody:nogroup /tmp/tftp

  • Obtain the name of the ethernet adapter (to be used in further steps):

    ip link

  • The result will loke something like (in this case, the name of the ethernet adapter is enp2s0):

    1: lo: <LOOPBACK,UP,LOWER_UP> mtu 65536 qdisc noqueue state UNKNOWN mode DEFAULT group default qlen 1000 link/loopback 00:00:00:00:00:00 brd 00:00:00:00:00:002: enp2s0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc fq_codel state UP mode DEFAULT group default qlen 1000 link/ether xx:xx:xx:xx:xx:xx brd ff:ff:ff:ff:ff:ff3: wlp3s0: <BROADCAST,MULTICAST,UP,LOWER_UP> mtu 1500 qdisc noqueue state UP mode DORMANT group default qlen 1000 link/ether yy:yy:yy:yy:yy:yy brd ff:ff:ff:ff:ff:ff

  • Set a static address on your PC to serve the firmware from: 

    sudo ip address flush dev <adapter name>sudo ip address add 192.168.31.100/24 dev <adapter name>

  • Run the server with the following command:

    sudo dnsmasq --no-daemon --listen-address=192.168.31.100 --bind-interfaces --dhcp-range=192.168.31.2,192.168.31.254 --enable-tftp --tftp-root=/tmp/tftp --log-dhcp --log-facility=-

  • Unplug the power, press and hold the reset button, plug the power back while still holding the button.

    • Hold the reset button until the router's LED starts flashing orange.

    • then it goes solid orange again, release the button.

    • If in the terminal, you see that the router requests a different firmware file (different name), rename the .img file in the tmp folder accordingly and repeat the procedures from the IP flush again.

  • When the device finished loading the firmware, the led starts flashing with orange (amber) light. Wait for until blue led to goes solid!

    • It might take some time for the led to go solid blue

    • If the recovery doesn't accept the downloaded file the led switches to solid white - if this is the case, restart the recovery process with other file

    • If the led is blinking blue led it means the device was flashed successfully and can be restarted

  • Put your interface back to DHCP mode and start again with breaking your device

Using official Xiaomi Recovery Tool

  1. Windows only

  2. Automates the process of setting network interface, setting TFTP server

https://bigota.miwifi.com/xiaoqiang/tools/MIWIFIRepairTool.x86.zip

Youtube tutorial with AX6S in Chinese: https://www.youtube.com/watch?v=XBaR9t-UndI

→ Basic configuration After flashing, proceed with this.
Set up your Internet connection, configure wireless, configure USB port, etc.

The default network configuration is:

Interface Name Description Default configuration
br-lan LAN & WiFi 192.168.1.1/24
lanX (eth0) LAN ports (2 to 4) None
wan (eth0) WAN port DHCP
phy0-ap0 WiFi 2.4G Disabled
phy1-ap0 WiFi 5G Disabled

Numbers 2-4 are Ports 1-3 as labeled on the unit, number 4 is the Internet (WAN) on the unit, 0 is the internal connection to the router itself.

Port Switch port
LAN 2 1
LAN 3 2
LAN 4 3
Internet (WAN) 4

→ hardware.button on howto use and configure the hardware button(s).Here, we merely name the buttons, so we can use them in the above Howto.

The Xiaomi Redmi AX6000 has the following buttons:

BUTTON Event
Reset reset
Mesh BTN_9

There are several LED arrays whose colors can be customized using started RBG numbers, namely:

/sys/class/leds/rgb:network/multi_intensity/sys/class/leds/rgb:status/multi_intensity

For example, setting the status to indigo:

# echo '75 0 130' > /sys/class/leds/rgb:status/multi_intensity

To keep modifications across reboots, simply append a line to <html>/etc/rc.local</html>

[[ -f /sys/class/leds/rgb:status/multi_intensity ]] && echo '75 0 130' > /sys/class/leds/rgb:status/multi_intensity

Front:
Insert photo of front of the casing

Back:
Insert photo of back of the casing

Backside label:
Insert photo of backside label

Note: This will void your warranty!

  1. Remove 4 rubber feet on the bottom of the device

  2. Use a Phillips screwdriver to remove the 4 screws

  3. A tiny flathead or plastic pry tool can be wedged in between the bottom case by the antennas. Gently push and slide it along the groove and it will pop open.

Main PCB:
Insert photo of PCB

→ port.serial general information about the serial port, serial port cable, etc.

Once the case has been removed, locate the serial port: with the antennae facing up, the headers are in the upper-right section of the board just above the heatsink

Serial connection parameters
for Xiaomi Redmi AX6000 		115200, 8N1, 3.3V

→ port.jtag general information about the JTAG port, JTAG cable, etc.

How to connect to the JTAG Port of this specific device:
Insert photo of PCB with markings for JTAG port

None so far.

The OEM bootlog provided below has been captured on a Bdata-modified device to enable UART and Telnet. An unmodified version will cut the bootlog short.

F0: 102B 0000FA: 1040 0000FA: 1040 0000 [0200]F9: 0000 0000V0: 0000 0000 [0001]00: 0000 0000BP: 2400 0041 [0000]G0: 1190 0000EC: 0000 0000 [1000]T0: 0000 022F [010F]Jump to BLNOTICE: BL2: v2.6(release):2598dbc2a6-dirtyNOTICE: BL2: Built : 13:34:54, Mar 12 2022INFO: BL2: Doing platform setupNOTICE: WDT: disabledNOTICE: CPU: MT7986 (2000MHz)NOTICE: EMI: Using DDR4 settingsbefore ctrl3 = 0x0clear request & ackafter ctrl3 = 0x0DVFSRC_SUCCESS 0dump drm registers data: 1001d000 | 00000000 00000000 00000000 000000001001d010 | 00000000 00000000 00000000 000000001001d020 | 00000000 00000000 00000000 000000001001d030 | 00a083f1 000003ff 00100000 000000001001d040 | 00000000 00000000 00020303 000000ff1001d050 | 00000000 00000000 00000000 000000001001d060 | 00000002 00000000 00000000 00000000drm: 500 = 0x8 toprgu: 80 = 0x0 [DDR Reserve] ddr reserve mode not be enabled yetSave DRM_DEBUG_CTL(0xa083f1)DRM_LATCH_CTL : 0x27e71DRM_LATCH_CTL2: 0x200a0drm_update_reg: 1, bits: 0x8000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x80000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x200, addr: 0x1001d034, val: 0x1ffdrm_update_reg: 0, bits: 0x200000, addr: 0x1001d034, val: 0x1ffdrm_update_reg: 0, bits: 0x100, addr: 0x1001d034, val: 0xffMTK_DRM_DEBUG_CTL : 0xa083f1MTK_DRM_DEBUG_CTL2: 0xffdrm_update_reg: 0, bits: 0x4000, addr: 0x1001d030, val: 0xa083f1DRM DDR reserve mode FAIL! a083f1DDR RESERVE Success 0drm_update_reg: 0, bits: 0x2000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x1000, addr: 0x1001d030, val: 0xa083f1[DRAM] into mt_set_emi[EMI] ComboMCP not ready, using default setting Init_DRAM:2139: init PCDDR4 dram Start[MD32_INIT] in c code >>>>>> [MD32_INIT] 3 [MD32_INIT] 4 [MD32_INIT] 5 [MD32_INIT] 6 [MD32_INIT] V22 add 1 [MD32_INIT] V22 add 1 end [MD32_INIT] 7 [MD32_INIT] 8 [MD32_INIT] 9 [MD32_INIT] 10 [MD32_INIT] 11 [MD32_INIT] 12 [MD32_INIT] 13 [MD32_INIT] 14 [MD32_INIT] 15 [MD32_INIT] 16 [MD32_INIT] 17 [MD32_INIT] 18 [MD32_INIT] 19 [MD32_INIT] 20 [MD32_INIT] 21 [MD32_INIT] 22 [MD32_INIT] 23 [MD32_INIT] 28 [MD32_INIT] 29 [MD32_INIT] 30 for RTMRW, if have [MD32_INIT] in c code <<<<<< [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0[Bian_co] ETT version 0.0.0.1 dram_type 4, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=136Read voltage for 1600, 0Vio18 = 0Vcore = 0Vdram = 0Vddq = 0Vmddr = 0== DRAMC_CTX_T ==support_channel_num: 1channel: 0support_rank_num: 1rank: 0freq_sel: 22shu_type: 0dram_type: 4dram_fsp: 0odt_onoff: 1DBI_R_onoff: 0, 0DBI_W_onoff: 0, 0data_width: 16test2_1: 0x55000000test2_2: 0xaa000100frequency: 1600freqGroup: 1600u1PLLMode: 0dram type 6 ===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================OCD DRVP=0 ,CALOUT=0OCD DRVP=1 ,CALOUT=0OCD DRVP=2 ,CALOUT=0OCD DRVP=3 ,CALOUT=0OCD DRVP=4 ,CALOUT=0OCD DRVP=5 ,CALOUT=0OCD DRVP=6 ,CALOUT=0OCD DRVP=7 ,CALOUT=0OCD DRVP=8 ,CALOUT=0OCD DRVP=9 ,CALOUT=1OCD DRVP calibration OK! DRVP=9OCD DRVN=0 ,CALOUT=1OCD DRVN=1 ,CALOUT=1OCD DRVN=2 ,CALOUT=1OCD DRVN=3 ,CALOUT=1OCD DRVN=4 ,CALOUT=1OCD DRVN=5 ,CALOUT=1OCD DRVN=6 ,CALOUT=0OCD DRVN calibration OK! DRVN=6[SwImpedanceCal] DRVP=9, DRVN=6freq_region=0, Reg: DRVP=11, DRVN=8, ODTP=6MEM_TYPE=6, freq_sel=22[ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:=================================== PCDDR4 DRAM CONFIGURATION=================================== CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8=================================== =================================== ANA top config=================================== ASYNC_MODE = 3DLL_ASYNC_EN = 1ALL_SLAVE_EN = 0NEW_RANK_MODE = 0DLL_IDLE_MODE = 1LP45_APHY_COMB_EN = 1TX_ODT_DIS = 0NEW_8X_MODE = 0=================================== =================================== data_rate = 3200CKR = 1DQ_P2S_RATIO = 8=================================== CA_P2S_RATIO = 8DQ_CA_OPEN = 0DQ_SEMI_OPEN = 0CA_SEMI_OPEN = 0CA_FULL_RATE = 0DQ_CKDIV4_EN = 0CA_CKDIV4_EN = 0CA_PREDIV_EN = 0PH8_DLY = 31SEMI_OPEN_CA_PICK_MCK_RATIO= 0DQ_AAMCK_DIV = 4CA_AAMCK_DIV = 4CA_ADMCK_DIV = 4DQ_TRACK_CA_EN = 0CA_PICK = 1600CA_MCKIO = 1600MCKIO_SEMI = 0PLL_FREQ = 3200DQ_UI_PI_RATIO = 32CA_UI_PI_RATIO = 0=================================== =================================== memory_type:PCDDR4 GP_NUM : 1 SRAM_EN : 1 MD32_EN : 0 =================================== =========================================== HW_ZQCAL_config=========================================== ZQCALL is 0TZQLAT is 27ZQCSDUAL is 0ZQCSCNT is 511=========================================== [ANA_INIT] >>>>>>>>>>>>>> [ANA_ClockOff_Sequence] flow start WLY_DEBUG::ANA_ClockOff_Sequence delay 100ns start WLY_DEBUG::ANA_ClockOff_Sequence delay 100ns end [ANA_ClockOff_Sequence] flow end ============ PULL DRAM RESETB DOWN ====================== PULL DRAM RESETB DOWN end ===================== SUSPEND_ON ======================== SUSPEND_ON end ======================== SPM_control ======================== SPM_control end ============<<<<<< [CONFIGURE PHASE]: ANA_TX>>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL=================================== data_rate = 3200,PCW = 0X7800=================================== <<<<<< [CONFIGURE PHASE][SHUFFLE]: PLLINFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 INFO: RG_ARCMD_REV_TEMP_VALUE= 0x0 INFO: RG_ARCMD_REV_TEMP_VALUE= 0x60 >>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configurationINFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0 PH8_DLY= 0x1f INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 PH8_DLY= 0x1f INFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0 INFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0 PH8_DLY= 0x1f INFO: RG_ARCMD_REV_TEMP_VALUE= 0x60 INFO: RG_ARCMD_REV_TEMP_VALUE= 0x60 PH8_DLY= 0x1f <<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration>>>>>> [CONFIGURE PHASE][SHUFFLE]: DLLINFO: RG_ARCMD_REV_TEMP_VALUE= 0x60 INFO: RG_ARCMD_REV_TEMP_VALUE= 0x61 <<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL[ANA_INIT] flow start [ANA_INIT] PLL >>>>>>>> [ANA_INIT] PLL <<<<<<<< [ANA_INIT] MIDPI >>>>>>>> [ANA_INIT] MIDPI <<<<<<<< [ANA_INIT] DLL >>>>>>>> [ANA_INIT] DLL <<<<<<<< [ANA_INIT] flow end [ANA_INIT] <<<<<<<<<<<<< [Flow] [DDRPHY] DIG_CONFIG_NONSHUF_DCM <<<<< [Flow] [DDRPHY] DIG_CONFIG_NONSHUF_DCM <<<<< [Flow] Enable top DCM control >>>>> [Flow] Enable top DCM control <<<<< Enable DLL master slave shuffle ============================================================== Gating Mode config============================================================== Config description: RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst ModeRX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (Jade-like) 2: FIFO modeSELPH_MODE 0: By rank 1: By Phase ============================================================== GAT_TRACK_EN = 1RX_GATING_MODE = 2RX_GATING_TRACK_MODE = 2SELPH_MODE = 1PICG_EARLY_EN = 1VALID_LAT_VALUE = 0============================================================== Enter into Gating configuration >>>> Exit from Gating configuration <<<< [DIG_HW_NONSHUF_ZQCAL_CFG],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG_FOR_PCDDR],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG_FOR_PCDDR],Configuration EnterEnter into PICG configuration >>>> Exit from PICG configuration <<<< [DIG_SHUF_CONFIG] DCM_FUNCTION >>>>>>, group_id=0 [DIG_SHUF_CONFIG] DCM_FUNCTION <<<<<<, group_id=0 [DIG_FREQ_CONFIG][TX_CA][Delay] ch_id:0, group_id:0 >>>>>[DIG_FREQ_CONFIG][TX_CA][Delay] ch_id:0, group_id:0 <<<<<[DIG_HW_SHUF_ZQCAL_CFG] Group:0, Configuration Enter[ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:=================================== PCDDR4 DRAM CONFIGURATION=================================== CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8=================================== [ReadLatency GET] MR_CL:[ReadLatency GET] MR_CL:UI_MCK_least is 1RX_GW_selph_by_ps[0] is 12464RX_GW_selph_by_ps[1] is 12464RX_GW_selph_by_ps[2] is 12464RX_GW_selph_by_ps[3] is 12464=================================== RX_path CONFIGURATION=================================== data_rate is 3200dq_p2s_ratio is 8ca_default_delay is 1ca_ser_latency is 7cs2RL_start is 1byte_num is 2rank_num is 2RL[0] is 24RL[1] is 24RL_min is 24RL_max is 24TDQSCK[0] is 0TDQSCK[1] is 0TDQSCK[2] is 0TDQSCK[3] is 0dqsien_default_delay is 0dqsien_ser_latency is 7oe_ser_latency is 4gating_window_ahead_dqs is 2aphy_slice_delay is 11aphy_dtc_delay is 100aphy_lead_lag_margin is 16dram_ui_ratio is 2dq_ui_unit is 312ca_ui_unit is 312MCK_unit is 2496dramc_dram_ratio is 4CKR is 1tRPRE_toggle is 0tRPRE_static is 2tRPST is 0DQSIENMODE is 1BL is 16FAKE_1TO16_MODE is 0SVA_1_10_t2_SPEC is 11read_cmd_out is 1ca_MCKIO_ui_unit is 312ca_p2s_ratio is 8TDQSCK_min_SPEC is 0TDQSCK_max_SPEC is 360TX_pipeline is 1RX_pipeline is 1NEW_RANK_MODE is 0close_loop_mode is 1=================================== =================================== RX_path RG value=================================== RX_UI_P0[0] is 15RX_UI_P0[1] is 15RX_UI_P0[2] is 15RX_UI_P0[3] is 15RX_UI_P1[0] is 19RX_UI_P1[1] is 19RX_UI_P1[2] is 19RX_UI_P1[3] is 19RX_PI[0] is 31RX_PI[1] is 31RX_PI[2] is 31RX_PI[3] is 31DQSINCTL is 3DATLAT_DSEL is 11DATLAT is 12DATLAT_DSEL_PHY is 12DLE_EXTEND is 1RX_IN_GATE_EN_HEAD is 0RX_IN_GATE_EN_TAIL is 0RX_IN_BUFF_EN_HEAD is 2RX_IN_BUFF_EN_TAIL is 0RX_IN_GATE_EN_PRE_OFFSET is 2RANKINCTL_ROOT1 is 1RANKINCTL is 1RANKINCTL_STB is 2RANKINCTL_RXDLY is 0SHU_GW_THRD_POS is 42SHU_GW_THRD_NEG is 0RDSEL_TRACK_EN is 0RDSEL_HWSAVE_MSK is 1DMDATLAT_i is 12RODTEN is 0RODT is 1541211177RODTE is 1RODTE2 is 1ODTEN_MCK_P0[4] is 0ODTEN_MCK_P1[4] is 0ODTEN_UI_P0[4] is 0ODTEN_UI_P1[4] is 0RX_RANK_DQS_LAT is 0RX_RANK_DQ_LAT is 1RANKINCTL_PHY is 5RANK_SEL_LAT_CA is 0RANK_SEL_LAT_B0 is 0RANK_SEL_LAT_B1 is 0RANK_SEL_STB_EN is 0RANK_SEL_RXDLY_TRACK is 0RANK_SEL_STB_TRACK is 1RANK_SEL_STB_PHASE_EN is 1RANK_SEL_PHSINCTL is 2RANK_SEL_STB_UI_MINUS is 2RANK_SEL_STB_UI_PLUS is 0RANK_SEL_MCK_P0 is 0RANK_SEL_UI_P0 is 0RANK_SEL_MCK_P1 is 1RANK_SEL_UI_P1 is 0R0DQSIENLLMTEN is 1R0DQSIENLLMT is 96R0DQSIENHLMTEN is 1R0DQSIENHLMT is 63R1DQSIENLLMTEN is 1R1DQSIENLLMT is 96R1DQSIENHLMTEN is 1R1DQSIENHLMT is 63DQSIEN_FIFO_DEPTH_HALF is 1=================================== [ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:=================================== PCDDR4 DRAM CONFIGURATION=================================== CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8=================================== [WriteLatency GET] MR_CWL:[WriteLatency GET] MR_CWL:=====================================print TX_path_config=====================================data_ratio is 3200dq_p2s_ratio is 8cs2WL_start is 1byte_num is 2rank_num is 2CKR is 1DBI_WR is 0dly_1T_by_FDIV2 is 0WL[0] is 20WL[1] is 20TDQSS[0][0] is 156TDQSS[0][1] is 156TDQSS[1][0] is 156TDQSS[1][1] is 156TDQS2DQ[0][0] is 0TDQS2DQ[0][1] is 0TDQS2DQ[1][0] is 0TDQS2DQ[1][1] is 0ca_p2s_ratio is 8ca_default_dly is 1ca_default_pi is 0ca_ser_latency is 7dqs_ser_laterncy is 7dqs_default_dly is 5dqs_oe_default_dly is 2dq_ser_laterncy is 7MCK_unit is 2496dq_ui_unit is 312ca_unit is 312ca_MCKIO_unit is 312ca_frate is 0TX_ECC is 0TWPRE is 4OE_pre_margin is 400OE_pst_margin is 500OE_downgrade is 1aphy_slice_dly is 11aphy_dtc_dly is 100aphy_tx_dly is 16DDRPHY_CLK_EN_COMB_TX_OPT is 1NEW_RANK_MODE is 0close_loop_mode is 1TXP_WORKAROUND_OPT is 0ui2pi_ratio is 32XRTW2W_PI_mute_time is 7fake_mode is 0===========================================TX_DQ_UI_OE_pre is 2TX_DQS_UI_OE_pre is 1data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3 data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3 data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3 data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3 ===========================================print TX_path_attribution===========================================TX_DQ_MCK_OE[0][0] is 2TX_DQ_MCK_OE[0][1] is 2TX_DQ_MCK_OE[1][0] is 2TX_DQ_MCK_OE[1][1] is 2TX_DQ_UI_OE[0][0] is 6TX_DQ_UI_OE[0][1] is 6TX_DQ_UI_OE[1][0] is 6TX_DQ_UI_OE[1][1] is 6TX_DQ_MCK[0][0] is 3TX_DQ_MCK[0][1] is 3TX_DQ_MCK[1][0] is 3TX_DQ_MCK[1][1] is 3TX_DQ_UI[0][0] is 2TX_DQ_UI[0][1] is 2TX_DQ_UI[1][0] is 2TX_DQ_UI[1][1] is 2TX_DQ_PI[0][0] is 0TX_DQ_PI[0][1] is 0TX_DQ_PI[1][0] is 0TX_DQ_PI[1][1] is 0TX_DQ_UIPI_all[0][0] is 0TX_DQ_UIPI_all[0][1] is 0TX_DQ_UIPI_all[1][0] is 0TX_DQ_UIPI_all[1][1] is 0TX_DQ_dlyline[0][0] is 0TX_DQ_dlyline[0][1] is 0TX_DQ_dlyline[1][0] is 0TX_DQ_dlyline[1][1] is 0TX_DQS_MCK_OE[0][0] is 2TX_DQS_MCK_OE[0][1] is 2TX_DQS_MCK_OE[1][0] is 2TX_DQS_MCK_OE[1][1] is 2TX_DQS_UI_OE[0][0] is 6TX_DQS_UI_OE[0][1] is 6TX_DQS_UI_OE[1][0] is 6TX_DQS_UI_OE[1][1] is 6TX_DQS_MCK[0][0] is 3TX_DQS_MCK[0][1] is 3TX_DQS_MCK[1][0] is 3TX_DQS_MCK[1][1] is 3TX_DQS_UI[0][0] is 1TX_DQS_UI[0][1] is 1TX_DQS_UI[1][0] is 1TX_DQS_UI[1][1] is 1DDRPHY_CLK_EN_COMB_TX_OPT is 1TX_DQS_PI[0][0] is 16TX_DQS_PI[0][1] is 16TX_DQS_PI[1][0] is 16TX_DQS_PI[1][1] is 16DDRPHY_CLK_EN_COMB_TX_PICG_CNT is 2DDRPHY_CLK_EN_COMB_TX_DQS_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQS_SEL_P1 is 4DDRPHY_CLK_EN_COMB_TX_DQ_RK0_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQ_RK0_SEL_P1 is 4DDRPHY_CLK_EN_COMB_TX_DQ_RK1_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQ_RK1_SEL_P1 is 4DPHY_TX_DCM_EXTCNT is 0TX_PI_UPD_MODE is 1TX_PI_UPDCTL_B0 is 0TX_PI_UPDCTL_B1 is 0TX_RANKINCTL_ROOT is 0TX_RANKINCTL is 1TX_RANKINCTL_TXDLY is 2DDRPHY_CLK_DYN_GATING_SEL is 5DDRPHY_CLK_EN_OPT is 1ARPI_CMD is 0TDMY is 9TXOEN_AUTOSET_DQ_OFFSET is 3TXOEN_AUTOSET_DQS_OFFSET is 3TXOEN_AUTOSET_EN is 1TXPICG_AUTOSET_OPT is 0TXPICG_AUTOSET_EN is 1TXPICG_DQ_MCK_OFFSET_LAG is 0TXPICG_DQS_MCK_OFFSET_LAG is 0TXPICG_DQ_UI_OFFSET_LEAD is 0TXPICG_DQ_UI_OFFSET_LAG is 1TXPICG_DQS_UI_OFFSET_LEAD is 1TXPICG_DQS_UI_OFFSET_LAG is 0===========================================set APHY_PI_CKCGH_CNT is 4 when not fake_mode, cur data_rate is 3200[DIG_SHUF_CONFIG] MISC >>>>>, group_id=0 [DIG_SHUF_CONFIG] MISC <<<<<<, group_id=0 [DIG_SHUF_CONFIG] DBI >>>>>>, group_id=0 [DIG_SHUF_CONFIG] DBI <<<<<<, group_id=0 dramc_dram_ratio: 4DDR4_DivMode: 1freq_index: 1600match AC timing 1[DDR4_ac_timing_setting]start[PC4 WR preamble settings]>>>>>>>> group_id = 0.[PC4 WR preamble settings]<<<<<<<< group_id = 0.clk_dramc_ref_sel FREQ=16fmem_ck_bfe_dcm_ch0 FREQ=253fmem_ck_aft_dcm_ch0 FREQ=253SetClkFreeRun enter => DRAM clock free run mode = ON.[DDR4] Pull Down reset.[DDR4] cke fix low 10ns at least.[DDR4] Delay 200 us.[DDR4] Pull Up reset.[DDR4] Delay 500 us.[DDR4] DRAM initilization RK:0 Enter >>>>>>>>[DDR4] Delay TXPR TRFC+10ns - 350ns(8Gb density)+10ns[DDR4_MRS] RK:0-MA:2-OP:0x[DDR4_MRS] RK:0-MA:3-OP:0x[DDR4_MRS] RK:0-MA:1-OP:0x[DDR4_MRS] RK:0-MA:4-OP:0x[DDR4_MRS] RK:0-MA:5-OP:0x[DDR4] DQ Vref calibration>>>>>>>[DDR4] DQ Vref Enable DQ vref calibration.[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] wait tVREFDQE-150ns[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] DQ Vref modify range and value[DDR4] DQ Vref Exit DQ vref calibration.[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] wait tVREFDQx-150ns[DDR4] DQ Vref calibration<<<<<<<[DDR4_MRS] RK:0-MA:0-OP:0x[DDR4_ZQ] RK:0 Enter >>>>>>>>[DDR4_ZQ] RK:0 Exit <<<<<<<<[DDR4] Delay ZQinit - 718ns for 1333 at least max(512Mck,640ns)[DDR4] DRAM initilization RK:0 Exit <<<<<<<[DDR4] Enable refresh.....All bank refresh onlySetClkFreeRun enter => DRAM clock free run mode = OFF.[DIG_HW_NONSHUF_ZQCAL_SWITCH],Configuration Enter[DIG_HW_NONSHUF_DQSG_SWITCH],Configuration EnterSET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON[MiockJmeterHQA]===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[DramcMiockJmeter] u1RxGatingPI = 00 : 2282, 22821 : 2271, 22712 : 2271, 22713 : 2272, 22724 : 2271, 22715 : 2271, 22716 : 2276, 22767 : 2272, 22728 : 2272, 22729 : 2272, 227210 : 2272, 227211 : 2271, 227112 : 2271, 227113 : 2272, 227214 : 2271, 227115 : 2271, 227116 : 2272, 227217 : 2271, 227118 : 2271, 227119 : 2272, 227220 : 2271, 227121 : 2271, 227122 : 2271, 227123 : 2272, 227224 : 2271, 227125 : 2272, 227226 : 2271, 227127 : 2271, 227128 : 2272, 227229 : 2276, 227630 : 2272, 227231 : 2271, 227132 : 2272, 227233 : 2271, 227134 : 2272, 227235 : 2271, 227136 : 2271, 227137 : 2272, 183238 : 2271, 039 : 2272, 040 : 2271, 041 : 2272, 042 : 2267, 043 : 2267, 044 : 2271, 045 : 2272, 046 : 2271, 047 : 2271, 048 : 2267, 049 : 2271, 050 : 2271, 051 : 2272, 052 : 2271, 053 : 2271, 054 : 2271, 055 : 2271, 056 : 2272, 057 : 2271, 058 : 2271, 059 : 2276, 060 : 2276, 061 : 2271, 062 : 2272, 063 : 2276, 064 : 2271, 065 : 2272, 066 : 2276, 067 : 2272, 068 : 2272, 069 : 2271, 070 : 2271, 071 : 2272, 072 : 2276, 073 : 2271, 074 : 2271, 075 : 2272, 076 : 2271, 077 : 2271, 078 : 2271, 079 : 2272, 080 : 2271, 081 : 2271, 082 : 2276, 083 : 2271, 084 : 2272, 085 : 2272, 086 : 2271, 087 : 2266, 088 : 2272, 089 : 2271, 188890 : 2271, 226791 : 2271, 227192 : 2271, 227193 : 2272, 227294 : 2271, 227195 : 2272, 227296 : 2272, 227297 : 2276, 227698 : 2271, 227199 : 2271, 2271100 : 2271, 2271101 : 2271, 2271102 : 2272, 2272103 : 2272, 2272104 : 2276, 2276105 : 2272, 2272106 : 2272, 2272107 : 2276, 2276108 : 2271, 2271109 : 2271, 2271110 : 2271, 2271111 : 2272, 2272112 : 2271, 2271113 : 2271, 2271114 : 2271, 2271115 : 2271, 2271116 : 2272, 2272117 : 2271, 2271118 : 2271, 2271119 : 2271, 2271120 : 2271, 2271121 : 2271, 2271122 : 2276, 2276123 : 2271, 2271124 : 2276, 2276125 : 2271, 2271126 : 2272, 2272127 : 2271, 2271MIOCK jitter meterch=01T = (89-38)*2 = 102 dly cellsClock freq = 1560 MHz, period = 641 ps, 1 dly cell = 628/100 ps----->DramcWriteLeveling(PI) begin...===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Begin: 0, End: 63, Step: 1, Bound: 64[DDR4_MRS] RK:0-MA:2-OP:0x[DDR4_MRS] RK:0-MA:1-OP:0x[Write Leveling]delay byte0 byte1 byte2 byte3 0 O1( 1 1 1 O1( 1 1 2 O1( 1 1 3 O1( 1 1 4 O1( 1 1 5 O1( 1 1 6 O1( 1 1 7 O1( 1 1 8 O1( 1 1 9 O1( 1 1 10 O1( 1 1 11 O1( 1 0 12 O1( 1 0 13 O1( 1 0 14 O1( 1 0 15 O1( 1 0 16 O1( 0 0 17 O1( 0 0 18 O1( 0 0 19 O1( 0 0 20 O1( 0 0 21 O1( 0 0 22 O1( 0 0 23 O1( 0 0 24 O1( 0 0 25 O1( 0 0 26 O1( 0 0 27 O1( 0 0 28 O1( 0 0 29 O1( 0 0 30 O1( 0 0 31 O1( 0 0 32 O1( 0 0 33 O1( 0 0 34 O1( 0 0 35 O1( 0 0 36 O1( 0 0 37 O1( 0 0 38 O1( 0 0 39 O1( 0 0 40 O1( 0 0 41 O1( 0 0 42 O1( 0 1 43 O1( 1 1 44 O1( 1 1 45 O1( 1 1 46 O1( 1 1 47 O1( 1 1 48 O1( 1 1 49 O1( 1 1 Early breakpass bytecount = 0xff (0xff: all bytes pass) [DDR4_MRS] RK:0-MA:1-OP:0x[DDR4_MRS] RK:0-MA:2-OP:0xWrite leveling (Byte 0): 43 => 43Write leveling (Byte 1): 42 => 42DramcWriteLeveling(PI) end<-----===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[Gating] SW mode calibration[get_gating_start_pos] calculated gating ui = 15 12 0 | B1->B0 | 1111 1212 | 1 1 | (0 0) (0 0)12 4 | B1->B0 | 1111 1212 | 1 1 | (0 0) (0 0)12 8 | B1->B0 | 1111 1212 | 1 1 | (0 0) (0 0)12 12 | B1->B0 | 1111 1111 | 1 1 | (0 1) (0 1)12 16 | B1->B0 | 1111 1111 | 1 1 | (0 1) (0 1)12 20 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)12 24 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)12 28 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)13 0 | B1->B0 | 1111 1212 | 1 1 | (1 1) (1 1)13 4 | B1->B0 | 1111 1212 | 1 1 | (1 1) (1 1)13 8 | B1->B0 | 1111 1212 | 1 1 | (1 1) (1 1)13 12 | B1->B0 | 2323 2222 | 0 0 | (0 0) (0 0)13 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)13 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)13 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)13 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)14 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)14 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)14 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)14 12 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 0)14 16 | B1->B0 | 2222 2323 | 0 0 | (1 1) (0 1)14 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)14 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)14 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 0 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 4 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 8 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 12 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 16 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 0)16 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)16 12 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 0)16 16 | B1->B0 | 2323 2323 | 0 0 | (0 1) (0 1)16 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 12 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 16 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 12 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)18 16 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)18 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)18 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)18 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)best dqsien dly found for B0: (18, 14)19 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)best dqsien dly found for B1: (18, 14)best DQS0 dly(UI, PI) = (18, 14)best DQS1 dly(UI, PI) = (18, 14)[Gating] SW calibration Done[DDR4_MRS] RK:0-MA:3-OP:0x===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Start DQ dly to find pass range UseTestEngine =0UseTestEngine: 0RX Vref Scan: 0RX Vref 0 -> 0, step: 1RX Delay -48 -> 63, step: 4-48, [0] xxxxxxxx xxxxxxxx [MSB]-44, [0] xxxxxxxx xxxxxxxx [MSB]-40, [0] xxxxxxxx xxxxxxxx [MSB]-36, [0] xxxxxxxx xxxxxxxx [MSB]-32, [0] xxxxxxxx xxxxxxxx [MSB]-28, [0] xxxxxxxx xxxxxxxx [MSB]-24, [0] xxxxxxxx xxxxxxxx [MSB]-20, [0] xxxxxxxx xxxxxxxx [MSB]-16, [0] xxxxxxxx xxxxxxxx [MSB]-12, [0] xxxxxxxx xxxxxxxx [MSB]-8, [0] xxxxxxxx xxxxxxxx [MSB]-4, [0] xxxxxxox xxxxxxxx [MSB]0, [0] xxoxoxox xxoxoxxx [MSB]4, [0] oxoooxoo oooooxoo [MSB]8, [0] oooooooo oooooooo [MSB]12, [0] oooooooo oooooooo [MSB]16, [0] oooooooo oooooooo [MSB]20, [0] oooooooo oooooooo [MSB]24, [0] oooooooo oooooooo [MSB]28, [0] oooooooo oooooooo [MSB]32, [0] oooooooo oooooooo [MSB]36, [0] ooxoooxo oooooooo [MSB]40, [0] ooxoxoxo ooxoxoxo [MSB]44, [0] xoxxxxxx xxxxxxxx [MSB]48, [0] xxxxxxxx xxxxxxxx [MSB]RX Vref B0= 0, Window Sum 312, worse bit 2, min window 36iDelay=48, Bit 0, Center 23 (4 ~ 43) 40iDelay=48, Bit 1, Center 27 (8 ~ 47) 40iDelay=48, Bit 2, Center 17 (0 ~ 35) 36iDelay=48, Bit 3, Center 23 (4 ~ 43) 40iDelay=48, Bit 4, Center 19 (0 ~ 39) 40iDelay=48, Bit 5, Center 25 (8 ~ 43) 36iDelay=48, Bit 6, Center 15 (-4 ~ 35) 40iDelay=48, Bit 7, Center 23 (4 ~ 43) 40RX Vref B1= 0, Window Sum 312, worse bit 13, min window 36iDelay=48, Bit 8, Center 23 (4 ~ 43) 40iDelay=48, Bit 9, Center 23 (4 ~ 43) 40iDelay=48, Bit 10, Center 19 (0 ~ 39) 40iDelay=48, Bit 11, Center 23 (4 ~ 43) 40iDelay=48, Bit 12, Center 19 (0 ~ 39) 40iDelay=48, Bit 13, Center 25 (8 ~ 43) 36iDelay=48, Bit 14, Center 21 (4 ~ 39) 36iDelay=48, Bit 15, Center 23 (4 ~ 43) 40[DDR4_MRS] RK:0-MA:3-OP:0x===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DQS Delay:DQS0 = 0, DQS1 = 0DQM Delay:DQM0 = 21, DQM1 = 22DQ Delay:DQ0 =23, DQ1 =27, DQ2 =17, DQ3 =23DQ4 =19, DQ5 =25, DQ6 =15, DQ7 =23DQ8 =23, DQ9 =23, DQ10 =19, DQ11 =23DQ12 =19, DQ13 =25, DQ14 =21, DQ15 =23===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:2 Autok:0TX Vref Scan disable810 |3 0 42|[0] xxxxxxox xxxxxxxx [MSB]812 |3 0 44|[0] oxoxxxox xxxxxxxx [MSB]814 |3 0 46|[0] oxoxxxox xxxxxxxx [MSB]816 |3 0 48|[0] oxoxxxox xxoxxxox [MSB]818 |3 0 50|[0] oooooooo oxoooooo [MSB]832 |3 2 0|[0] ooooooxo ooxooooo [MSB]834 |3 2 2|[0] xoxoxoxo xoxoxooo [MSB]836 |3 2 4|[0] xoxoxoxo xxxxxoxx [MSB]838 |3 2 6|[0] xoxxxxxo xxxxxxxx [MSB]840 |3 2 8|[0] xxxxxxxx xxxxxxxx [MSB]TX Bit0 (812~832) 22 822, Bit8 (818~832) 16 825,TX Bit1 (818~838) 22 828, Bit9 (820~834) 16 827,TX Bit2 (812~832) 22 822, Bit10 (816~830) 16 823,TX Bit3 (818~836) 20 827, Bit11 (818~834) 18 826,TX Bit4 (818~832) 16 825, Bit12 (818~832) 16 825,TX Bit5 (818~836) 20 827, Bit13 (818~836) 20 827,TX Bit6 (810~830) 22 820, Bit14 (816~834) 20 825,TX Bit7 (818~838) 22 828, Bit15 (818~834) 18 826, == TX Byte 0 ==Update DQ dly =824 (3 ,0, 56) DQ OEN =(2 ,5)Update DQM dly =824 (3 ,0, 56) DQM OEN =(2 ,5) == TX Byte 1 ==Update DQ dly =825 (3 ,0, 57) DQ OEN =(2 ,5)Update DQM dly =825 (3 ,0, 57) DQM OEN =(2 ,5)===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:0 Autok:0[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 3[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 5[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 7[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 9[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 11[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 13[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 15[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 17TX Vref=3, minBit 8, minWin=13, winSum=263TX Vref=5, minBit 9, minWin=14, winSum=275TX Vref=7, minBit 10, minWin=14, winSum=281TX Vref=9, minBit 9, minWin=16, winSum=295TX Vref=11, minBit 10, minWin=15, winSum=299TX Vref=13, minBit 10, minWin=15, winSum=305TX Vref=15, minBit 9, minWin=17, winSum=317TX Vref=17, minBit 4, minWin=18, winSum=323[TxChooseVref] Worse bit 4, Min win 18, Win sum 323, Final Vref 17[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 17Final TX Range 1 Vref 17===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:0 Autok:0TX Vref Scan disable810 |3 0 42|[0] xxxxxxxx xxxxxxxx [MSB]811 |3 0 43|[0] xxxxxxox xxxxxxxx [MSB]812 |3 0 44|[0] xxxxxxox xxxxxxxx [MSB]813 |3 0 45|[0] xxxxxxox xxxxxxxx [MSB]814 |3 0 46|[0] oxoxxxox xxoxxxxx [MSB]815 |3 0 47|[0] oxoxxxox xxoxoxox [MSB]816 |3 0 48|[0] oxoxxxox xxoxoooo [MSB]817 |3 0 49|[0] oooooooo oxoooooo [MSB]833 |3 2 1|[0] ooooooxo oooooooo [MSB]834 |3 2 2|[0] xoxoooxo ooxooooo [MSB]835 |3 2 3|[0] xoxoxoxo xoxoxooo [MSB]836 |3 2 4|[0] xoxoxoxo xoxxxoxx [MSB]837 |3 2 5|[0] xoxoxoxo xxxxxxxx [MSB]838 |3 2 6|[0] xoxxxoxo xxxxxxxx [MSB]839 |3 2 7|[0] xoxxxxxo xxxxxxxx [MSB]840 |3 2 8|[0] xxxxxxxx xxxxxxxx [MSB]TX Bit0 (814~833) 20 823, Bit8 (817~834) 18 825,TX Bit1 (817~839) 23 828, Bit9 (818~836) 19 827,TX Bit2 (814~833) 20 823, Bit10 (814~833) 20 823,TX Bit3 (817~837) 21 827, Bit11 (817~835) 19 826,TX Bit4 (817~834) 18 825, Bit12 (815~834) 20 824,TX Bit5 (817~838) 22 827, Bit13 (816~836) 21 826,TX Bit6 (811~832) 22 821, Bit14 (815~835) 21 825,TX Bit7 (817~839) 23 828, Bit15 (816~835) 20 825,[TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =628/100 ps == TX Byte 0 ==u2DelayCellOfst[0]=3 cells (2 PI)u2DelayCellOfst[1]=10 cells (7 PI)u2DelayCellOfst[2]=3 cells (2 PI)u2DelayCellOfst[3]=9 cells (6 PI)u2DelayCellOfst[4]=6 cells (4 PI)u2DelayCellOfst[5]=9 cells (6 PI)u2DelayCellOfst[6]=0 cells (0 PI)u2DelayCellOfst[7]=10 cells (7 PI)Update DQ dly =821 (3 ,0, 53) DQ OEN =(2 ,5)Update DQM dly =824 (3 ,0, 56) DQM OEN =(2 ,5) == TX Byte 1 ==u2DelayCellOfst[8]=3 cells (2 PI)u2DelayCellOfst[9]=6 cells (4 PI)u2DelayCellOfst[10]=0 cells (0 PI)u2DelayCellOfst[11]=4 cells (3 PI)u2DelayCellOfst[12]=1 cells (1 PI)u2DelayCellOfst[13]=4 cells (3 PI)u2DelayCellOfst[14]=3 cells (2 PI)u2DelayCellOfst[15]=3 cells (2 PI)Update DQ dly =823 (3 ,0, 55) DQ OEN =(2 ,5)Update DQM dly =825 (3 ,0, 57) DQM OEN =(2 ,5)===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DATLAT Default: 0xc0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0x10, 0x11, 0x12, 0x13, 0xbest_step = 11===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Start DQ dly to find pass range UseTestEngine =1UseTestEngine: 1RX Vref Scan: 1Set Vref Range= 9 -> 21RX Vref 9 -> 21, step: 1RX Delay -14 -> 63, step: 2Set Vref, RX VrefLevel [Byte0]: 9 [Byte1]: 9RX Vref B0= 9, Window Sum 226, worse bit 6, min window 26RX Vref B1= 9, Window Sum 208, worse bit 10, min window 24Set Vref, RX VrefLevel [Byte0]: 10 [Byte1]: 10RX Vref B0= 10, Window Sum 236, worse bit 4, min window 28RX Vref B1= 10, Window Sum 222, worse bit 10, min window 26Set Vref, RX VrefLevel [Byte0]: 11 [Byte1]: 11RX Vref B0= 11, Window Sum 250, worse bit 0, min window 30RX Vref B1= 11, Window Sum 236, worse bit 10, min window 26Set Vref, RX VrefLevel [Byte0]: 12 [Byte1]: 12RX Vref B0= 12, Window Sum 260, worse bit 0, min window 32RX Vref B1= 12, Window Sum 240, worse bit 10, min window 28Set Vref, RX VrefLevel [Byte0]: 13 [Byte1]: 13RX Vref B0= 13, Window Sum 264, worse bit 0, min window 32RX Vref B1= 13, Window Sum 246, worse bit 10, min window 28Set Vref, RX VrefLevel [Byte0]: 14 [Byte1]: 14RX Vref B0= 14, Window Sum 278, worse bit 1, min window 34RX Vref B1= 14, Window Sum 260, worse bit 10, min window 30Set Vref, RX VrefLevel [Byte0]: 15 [Byte1]: 15RX Vref B0= 15, Window Sum 286, worse bit 4, min window 34RX Vref B1= 15, Window Sum 266, worse bit 9, min window 32Set Vref, RX VrefLevel [Byte0]: 16 [Byte1]: 16RX Vref B1= 16, Window Sum 276, worse bit 10, min window 32Set Vref, RX VrefLevel [Byte0]: 17 [Byte1]: 17RX Vref B0= 17, Window Sum 294, worse bit 0, min window 36RX Vref B1= 17, Window Sum 280, worse bit 8, min window 34Set Vref, RX VrefLevel [Byte0]: 18 [Byte1]: 18RX Vref B1= 18, Window Sum 290, worse bit 8, min window 34Set Vref, RX VrefLevel [Byte0]: 19 [Byte1]: 19Set Vref, RX VrefLevel [Byte0]: 20 [Byte1]: 20Final RX Vref Byte 0 = 17 to rank0 to rank1Final RX Vref Byte 1 = 18 to rank0 to rank1===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DQS Delay:DQS0 = 0, DQS1 = 0DQM Delay:DQM0 = 22, DQM1 = 24DQ Delay:DQ0 =23, DQ1 =27, DQ2 =19, DQ3 =25DQ4 =21, DQ5 =26, DQ6 =16, DQ7 =24DQ8 =24, DQ9 =26, DQ10 =22, DQ11 =26DQ12 =22, DQ13 =26, DQ14 =22, DQ15 =25[DualRankRxdatlatCal] RK0: 11, RK1: 0, Final_Datlat 11[Calibration Summary] Freqency 1600CH 0, Rank 0SW Impedance : PASSDUTY Scan : NO KZQ Calibration : PASSJitter Meter : NO KCBT Training : NO KWrite leveling : PASSRX DQS gating : PASSRX DQ/DQS(RDDQC) : PASSTX DQ/DQS : PASSRX DATLAT : PASSRX DQ/DQS(Engine): PASSTX OE : NO KAll Pass.TX_TRACKING: OFF[AUTO] write start address pass, BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x8000000[AUTO] BASE_ADDR : 0x8000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x10000000[AUTO] BASE_ADDR : 0x10000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x20000000[AUTO] BASE_ADDR : 0x20000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] TA2 read check fail, u4err_value = 65535, 3[AUTO] Detect full sizeu4DramSize 0x20000000NOTICE: EMI: Detected DRAM size: 512MB[MEM_TEST] 02: After DFS, before run time config[MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count = 16384, Fail count = 0)[TA2_TEST]=== TA2 HW=== OFFSET:0x200TA2 PAT: 3TA2 Trigger WriteHW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0[DramcRunTimeConfig]: ONPHYPLLDPM_CONTROL_AFTERK: ONPER_BANK_REFRESH: OFFREFRESH_OVERHEAD_REDUCTION: ONCMD_PICG_NEW_MODE: OFFTX_TRACKING: OFFRDSEL_TRACKING: OFFDQS Precalculation for DVFS: OFFRX_TRACKING: OFFDDR_HW_GATING DBG: ONDDR_ZQCS_ENABLE: ONRX_PICG_NEW_MODE: ONTX_PICG_NEW_MODE: ONENABLE_RX_DCM_DPHY: ONLOWPOWER_GOLDEN_SETTINGS(DCM): ONDUMMY_READ_FOR_TRACKING: OFF!!! SPM_CONTROL_AFTERK: OFF!!! SPM could not control APHYIMPEDANCE_TRACKING: OFFHW_SAVE_FOR_SR: OFFCLK_FREE_FUN_FOR_DRAMC_PSEL: OFFPA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFFRead ODT Tracking: OFFRefresh Rate DeBounce: OFFDFS_NO_QUEUE_FLUSH: OFFDFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFFENABLE_DFS_RUNTIME_MRW: OFFDDR_RESERVE_NEW_MODE: ON=========================[MEM_TEST] 03: After run time config[MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count = 16384, Fail count = 0)[TA2_TEST]=== TA2 HW=== OFFSET:0x200TA2 Trigger WriteHW channel(0) Rank(0), TA2 pass, pass_cnt:2, err_cnt:0Init_DRAM:2480: init PCDDR4 dram EndEMI: complex real chip dram calibrationVerify pattern 1 (0x00~0xff)...EMI: mem8_base[0] = pattern8 = 0x0Verify pattern 2 (0x00~0xffff)...EMI: mem16_base[0] = pattern16 = 0x0Verify pattern 3 (0x00~0xffffffff)...EMI: mem32_base[0] = pattern32 = 0x0NOTICE: EMI: complex R/W mem test passeddrm_dram_reserved: MTK_DRM_MODE(22000000)NOTICE: SPI_NAND parses attributes from parameter page.NOTICE: SPI_NAND Detected ID 0x0NOTICE: Page size 2048, Block size 131072, size 134217728NOTICE: Initializing NMBM ...NOTICE: Signature found at block 1023 [0x07fe0000]NOTICE: First info table with writecount 0 found in block 960NOTICE: Second info table with writecount 0 found in block 963NOTICE: NMBM has been successfully attached in read-only modeINFO: BL2: Loading image id 3INFO: Loading image id=3 at address 0x42000000INFO: Image id=3 loaded: 0x42000000 - 0x42009061INFO: BL2: Loading image id 5INFO: Loading image id=5 at address 0x42000000INFO: Image id=5 loaded: 0x42000000 - 0x420ae288NOTICE: BL2: Booting BL31INFO: Entry point address = 0x43001000INFO: SPSR = 0x3cdINFO: Total CPU count: 4INFO: MCUSYS: Disable 512KB L2C shared SRAMINFO: check_ver = 0INFO: Secondary bootloader is AArch64INFO: GICv3 without legacy support detected.INFO: ARM GICv3 driver initialized in EL3INFO: Maximum SPI INTID supported: 671INFO: SPMC: Changed to SPMC modeNOTICE: BL31: v2.6(release):2598dbc2a6-dirtyNOTICE: BL31: Built : 13:34:54, Mar 12 2022INFO: [MPU](Region0)sa:0x0300, ea:0x0302INFO: [MPU](Region0)apc0:0x80b6db69, apc1:0x00b6db6dINFO: [MPU](Region1)sa:0x0000, ea:0x0000INFO: [MPU](Region1)apc0:0x00000000, apc1:0x00000000INFO: [MPU](Region2)sa:0x0000, ea:0x0000INFO: [MPU](Region2)apc0:0x00000000, apc1:0x00000000INFO: [MPU](Region3)sa:0x0000, ea:0x0000INFO: [MPU](Region3)apc0:0x00000000, apc1:0x00000000INFO: [DEVAPC] devapc_init doneINFO: BL31: Initializing runtime servicesINFO: BL31: Preparing for EL3 exit to normal worldINFO: Entry point address = 0x41e00000INFO: SPSR = 0x3c9In: serial@11002000Out: serial@11002000Err: serial@11002000Net: eth0: ethernet@15100000detect button reset released!Reading from 0x0 to 0x5f7fdd8c, size 0x4 ... OKReading from 0x0 to 0x5f7fdd8c, size 0x4 ... OKSaving Environment to MTD... Erasing on MTD device 'nmbm0'... OKWriting to MTD device 'nmbm0'... OKOKBooting System 1ubi0: attaching mtd10ubi0: scanning is finishedubi0: attached mtd10 (name "ubi1", size 30 MiB)ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytesubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096ubi0: good PEBs: 240, bad PEBs: 0, corrupted PEBs: 0ubi0: user volume: 2, internal volumes: 1, max. volumes count: 128ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 662404348ubi0: available PEBs: 64, total reserved PEBs: 176, PEBs reserved for bad PEB handling: 19Reading from volume 'kernel' to 0x46000000, size 0x0 ... OK## Loading kernel from FIT Image at 46000000 ... Using 'config@1' configuration Trying 'kernel@1' kernel subimage Description: ARM64 OpenWrt Linux-5.4.150 Type: Kernel Image Compression: lzma compressed Data Start: 0x460000e8 Data Size: 3160816 Bytes = 3 MiB Architecture: AArch64 OS: Linux Load Address: 0x44080000 Entry Point: 0x44080000 Hash algo: crc32 Hash value: bd0e32dd Hash algo: sha1 Hash value: 994c9b27486ab63b8f302c3fb83dd30b09d54027 Verifying Hash Integrity ... crc32+ sha1+ OK## Loading fdt from FIT Image at 46000000 ... Using 'config@1' configuration Trying 'fdt@1' fdt subimage Description: ARM64 OpenWrt mt7986-RB06 device tree blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x46303d14 Data Size: 20485 Bytes = 20 KiB Architecture: AArch64 Hash algo: crc32 Hash value: 4c66671d Hash algo: sha1 Hash value: 65a8b044ad027aa577386dd21f4a51ac0a9e6287 Verifying Hash Integrity ... crc32+ sha1+ OK Booting using the fdt blob at 0x46303d14 Uncompressing Kernel Image Loading Device Tree to 000000005f7f1000, end 000000005f7f9004 ... OKStarting kernel ...[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034][ 0.000000] Linux version 5.4.150 (jenkins@a92f094d1440) (gcc version 8.4.0 (OpenWrt GCC 8.4.0 unknown)) #0 SMP Fri Aug 12 08:32:47 2022[ 0.000000] Machine model: MediaTek MT7986a RFB[ 0.000000] On node 0 totalpages: 130064[ 0.000000] DMA32 zone: 2048 pages used for memmap[ 0.000000] DMA32 zone: 0 pages reserved[ 0.000000] DMA32 zone: 130064 pages, LIFO batch:31[ 0.000000] psci: probing for conduit method from DT.[ 0.000000] psci: PSCIv1.1 detected in firmware.[ 0.000000] psci: Using standard PSCI v0.2 function IDs[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.[ 0.000000] psci: SMC Calling Convention v1.0[ 0.000000] percpu: Embedded 20 pages/cpu s43608 r8192 d30120 u81920[ 0.000000] pcpu-alloc: s43608 r8192 d30120 u81920 alloc=20*4096[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3 [ 0.000000] Detected VIPT I-cache on CPU0[ 0.000000] CPU features: detected: GIC system register CPU interface[ 0.000000] CPU features: kernel page table isolation disabled by kernel configuration[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 128016[ 0.000000] Kernel command line: console=ttyS0,115200n1 loglevel=8 firmware=1 uart_en=1[ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes, linear)[ 0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off[ 0.000000] Memory: 491052K/520256K available (6398K kernel code, 490K rwdata, 1892K rodata, 448K init, 283K bss, 29204K reserved, 0K cma-reserved)[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1[ 0.000000] rcu: Hierarchical RCU implementation.[ 0.000000] rcu: CONFIG_RCU_FANOUT set to non-default value of 32.[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 25 jiffies.[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode[ 0.000000] GICv3: 640 SPIs implemented[ 0.000000] GICv3: 0 Extended SPIs implemented[ 0.000000] GICv3: Distributor has no Range Selector support[ 0.000000] GICv3: 16 PPIs implemented[ 0.000000] GICv3: no VLPI support, no direct LPI support[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c080000[ 0.000000] random: get_random_bytes called from start_kernel+0x2d4/0x418 with crng_init=0[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns[ 0.000002] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns[ 0.000102] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=52000)[ 0.000108] pid_max: default: 32768 minimum: 301[ 0.000158] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)[ 0.000163] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)[ 0.000810] ASID allocator initialised with 65536 entries[ 0.000845] rcu: Hierarchical SRCU implementation.[ 0.001053] smp: Bringing up secondary CPUs ...[ 0.001263] Detected VIPT I-cache on CPU1[ 0.001282] GICv3: CPU1: found redistributor 1 region 0:0x000000000c0a0000[ 0.001301] CPU1: Booted secondary processor 0x0000000001 [0x410fd034][ 0.001520] Detected VIPT I-cache on CPU2[ 0.001528] GICv3: CPU2: found redistributor 2 region 0:0x000000000c0c0000[ 0.001537] CPU2: Booted secondary processor 0x0000000002 [0x410fd034][ 0.001727] Detected VIPT I-cache on CPU3[ 0.001735] GICv3: CPU3: found redistributor 3 region 0:0x000000000c0e0000[ 0.001742] CPU3: Booted secondary processor 0x0000000003 [0x410fd034][ 0.001768] smp: Brought up 1 node, 4 CPUs[ 0.001778] SMP: Total of 4 processors activated.[ 0.001781] CPU features: detected: 32-bit EL0 Support[ 0.001784] CPU features: detected: CRC32 instructions[ 0.001871] CPU: All CPU(s) started at EL2[ 0.001881] alternatives: patching kernel code[ 0.003577] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 7645041785100000 ns[ 0.003593] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)[ 0.003706] pinctrl core: initialized pinctrl subsystem[ 0.004178] NET: Registered protocol family 16[ 0.004344] DMA: preallocated 256 KiB pool for atomic allocations[ 0.005193] pstore: Registered ramoops as persistent store backend[ 0.005200] ramoops: using 0x100000@0x42f00000, ecc: 0[ 0.012358] cryptd: max_cpu_qlen set to 1000[ 0.013391] SCSI subsystem initialized[ 0.013485] libata version 3.00 loaded.[ 0.013963] workqueue: max_active 576 requested for napi_workq is out of range, clamping between 1 and 512[ 0.014443] rbus 18000000.wbsys: PCI host bridge to bus 0000:00[ 0.014451] pci_bus 0000:00: root bus resource [mem 0x18000000-0x18ffffff][ 0.014457] pci_bus 0000:00: root bus resource [bus 00-ff][ 0.014461] pci_bus 0000:00: scanning bus[ 0.014476] pci 0000:00:00.0: [14c3:7986] type 00 class 0x000280[ 0.014488] pci 0000:00:00.0: reg 0x10: [mem 0x18000000-0x1800000f 64bit][ 0.014493] pci 0000:00:00.0: reg 0x18: [mem 0x00000000-0x0000000f][ 0.014497] pci 0000:00:00.0: reg 0x1c: [mem 0x00000000-0x0000000f][ 0.014501] pci 0000:00:00.0: reg 0x20: [mem 0x00000000-0x0000000f][ 0.014505] pci 0000:00:00.0: reg 0x24: [mem 0x00000000-0x0000000f][ 0.015152] pci_bus 0000:00: fixups for bus[ 0.015156] pci_bus 0000:00: bus scan returning with max=00[ 0.015371] clocksource: Switched to clocksource arch_sys_counter[ 0.015780] thermal_sys: Registered thermal governor 'fair_share'[ 0.015782] thermal_sys: Registered thermal governor 'bang_bang'[ 0.015786] thermal_sys: Registered thermal governor 'step_wise'[ 0.015789] thermal_sys: Registered thermal governor 'user_space'[ 0.015792] thermal_sys: Registered thermal governor 'power_allocator'[ 0.015972] NET: Registered protocol family 2[ 0.016034] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)[ 0.016359] tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes, linear)[ 0.016366] TCP established hash table entries: 4096 (order: 3, 32768 bytes, linear)[ 0.016386] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)[ 0.016426] TCP: Hash tables configured (established 4096 bind 4096)[ 0.016477] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)[ 0.016487] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)[ 0.016562] NET: Registered protocol family 1[ 0.016586] PCI: CLS 0 bytes, default 64[ 0.017261] workingset: timestamp_bits=62 max_order=17 bucket_order=0[ 0.019005] squashfs: version 4.0 (2009/01/31) Phillip Lougher[ 0.019015] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.[ 0.027817] mtk-pcie 11280000.pcie: host bridge /pcie@11280000 ranges:[ 0.027828] mtk-pcie 11280000.pcie: Parsing ranges property...[ 0.027834] mtk-pcie 11280000.pcie: MEM 0x20000000..0x2fffffff -> 0x20000000[ 0.235392] mtk-pcie 11280000.pcie: PCIe link down, ltssm reg val: 0x1000001[ 0.235447] mtk-pcie: probe of 11280000.pcie failed with error -110[ 0.242974] Serial: 8250/16550 driver, 3 ports, IRQ sharing disabled[ 0.243451] printk: console [ttyS0] disabled[ 0.263571] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 12, base_baud = 2500000) is a ST16650V2[ 0.944134] printk: console [ttyS0] enabled[ 0.968665] 11003000.serial: ttyS1 at MMIO 0x11003000 (irq = 13, base_baud = 1625000) is a ST16650V2[ 0.998101] 11004000.serial: ttyS2 at MMIO 0x11004000 (irq = 14, base_baud = 1625000) is a ST16650V2[ 1.007647] mtk_rng 1020f000.trng: registered RNG driver[ 1.007873] random: fast init done[ 1.013063] cacheinfo: Unable to detect cache hierarchy for CPU 0[ 1.016580] random: crng init done[ 1.023962] loop: module loaded[ 1.030157] spi-nor spi0.0: unrecognized JEDEC id bytes: ff c8 01 7f 7f 7f[ 1.037039] spi-nor: probe of spi0.0 failed with error -2[ 1.042565] spi-nand spi0.1: GigaDevice/ESMT SPI NAND was found.[ 1.048565] spi-nand spi0.1: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64[ 1.057637] Ethernet Channel Bonding Driver: v3.7.1 (April 27, 2011)[ 1.065004] libphy: Fixed MDIO Bus: probed[ 1.069475] tun: Universal TUN/TAP device driver, 1.6[ 1.074678] mtk_probe none-cache-api init ! [ 1.079030] mtk_hw_init 3055 pending:0 [ 1.082851] mtk_hw_init 3060 pn-clk init [ 1.086868] mtk_hw_init 3069 [ 1.089822] mtk_hw_init 3086 [ 1.092778] mtk_eth_cold_reset 2975 [ 1.107340] ethsys_reset 2852 i:0 set:c0800040 read:6000004 reset:1[ 1.113590] ############ mtk_eth_fe_reset_update 1555 val:c0800040 fe_reset.val_s:c0800040 [ 1.121918] ############ mtk_eth_fe_reset_update 1559 val:6000004 fe_reset.val_r:6000004 [ 1.130072] ############ mtk_eth_fe_reset_update 1572 val:0 fe_reset.cold_cnt:1 [ 1.137446] mtk_hw_init 3094 read 0 rstctl:0[ 1.137447] mtk_hw_init 3095 [ 1.144654] mtk_hw_init 3103 FE/PPE/GMAC reset done [ 1.149702] mtk_probe 4263 fe-irq:127 [ 1.153490] libphy: mdio: probed[ 1.201582] mtk_soc_eth 15100000.ethernet: generated random MAC address de:20:67:c6:42:fa[ 1.209961] mtk_soc_eth 15100000.ethernet eth0: mediatek frame engine at 0xffffffc011a00000, irq 124[ 1.219092] mtk_soc_eth 15100000.ethernet: generated random MAC address 2e:b3:00:75:bc:93[ 1.227407] mtk_soc_eth 15100000.ethernet eth1: mediatek frame engine at 0xffffffc011a00000, irq 124[ 1.236519] (unnamed net_device) (dummy): netif_napi_add() called with weight 256[ 1.244022] 500210440 -> init fe_reset[ 1.247846] [mtk_probe] mtk_dma_monitor_timer is initialized ![ 1.253830] i2c /dev entries driver[ 1.258285] mtk-wdt 1001c000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)[ 1.266163] device-mapper: ioctl: 4.41.0-ioctl (2019-09-16) initialised: dm-devel@redhat.com[ 1.274875] leds-hm0807a spi1.0: led_driver_probe[ 1.279571] leds-hm0807a spi1.0: chip_num:5, led_num:5.[ 1.284782] leds-hm0807a spi1.0: led_driver_probe name:led_red[ 1.290628] leds-hm0807a spi1.0: led_driver_probe name:led_blue[ 1.296809] leds-hm0807a spi1.0: led_driver_probe name:led_yellow[ 1.302912] leds-hm0807a spi1.0: led_driver_probe name:led_white[ 1.308927] leds-hm0807a spi1.0: led_driver_probe name:led_green[ 1.315120] crypto-safexcel 10320000.crypto: EIP97:230(0,1,4,4)-HIA:270(0,5,5),PE:150/433,alg:7fcdfc00[ 1.328094] Initializing XFRM netlink socket[ 1.332571] NET: Registered protocol family 10[ 1.337472] Segment Routing with IPv6[ 1.341167] NET: Registered protocol family 17[ 1.345606] NET: Registered protocol family 15[ 1.350059] Bridge firewalling registered[ 1.354055] 8021q: 802.1Q VLAN Support v1.8[ 1.358728] pstore: Using crash dump compression: deflate[ 1.370324] nmbm nmbm_spim_nand: Signature found at block 1023 [0x07fe0000][ 1.378152] nmbm nmbm_spim_nand: First info table with writecount 0 found in block 960[ 1.388640] nmbm nmbm_spim_nand: Second info table with writecount 0 found in block 963[ 1.396641] nmbm nmbm_spim_nand: NMBM has been successfully attached [ 1.403193] 10 fixed-partitions partitions found on MTD device nmbm_spim_nand[ 1.410312] Creating 10 MTD partitions on "nmbm_spim_nand":[ 1.415869] 0x000000000000-0x000000100000 : "BL2"[ 1.420965] 0x000000100000-0x000000140000 : "Nvram"[ 1.426115] 0x000000140000-0x000000180000 : "Bdata"[ 1.431252] 0x000000180000-0x000000380000 : "Factory"[ 1.436565] 0x000000380000-0x000000580000 : "FIP"[ 1.441531] 0x000000580000-0x0000005c0000 : "crash"[ 1.446672] 0x0000005c0000-0x000000600000 : "crash_log"[ 1.452178] 0x000000600000-0x000002400000 : "ubi"[ 1.457185] 0x000002400000-0x000004200000 : "ubi1"[ 1.462282] 0x000004200000-0x000007400000 : "overlay"[ 2.019402] mt753x gsw@0: LAN/WAN VLAN setting=llllw[ 2.024626] mt753x gsw@0: Switch is MediaTek MT7531AE rev 1[ 2.034039] mt753x gsw@0: HWSTRAP=0xff XTAL=25MHz[ 4.063757] libphy: mt753x_mdio: probed[ 4.067625] init port map proc seccess![ 5.681177] mt753x gsw@0: >>>>>>>>>>>>>>>>>>>>>>>>>>>>> START CALIBRATION:[ 5.692959] mt753x gsw@0: -------- gephy-calbration (port:0) --------[ 5.708146] CALDLY = 40[ 5.775868] 0x1e-e0 = 2a2a[ 5.780260] 0x1f-115 = 5[ 5.782777] GE Rext AnaCal Done! (10)(0x2a) [ 5.860533] GE R50 AnaCal Done! (13) (0x26)(0xa6) [ 5.933696] GE R50 AnaCal Done! (13) (0x26)(0xa6) [ 6.006860] GE R50 AnaCal Done! (13) (0x26)(0xa6) [ 6.084577] GE R50 AnaCal Done! (14) (0x24)(0xa4) [ 6.092417] GE 1e_174(0xa6a6), 1e_175(0xa6a4) [ 6.129651] GE Tx offset AnaCal Done! (pair-0)(2)(0x21) 0x1e_172=0x2120[ 6.163595] GE Tx offset AnaCal Done! (pair-1)(4)(0x23) 0x1e_172=0x2123[ 6.188437] GE Tx offset AnaCal Done! (pair-2)(2)(0x21) 0x1e_173=0x2120[ 6.213280] GE Tx offset AnaCal Done! (pair-3)(2)(0x2) 0x1e_173=0x2102[ 6.310410] GE Tx amp AnaCal Done! (pair-0)(1e_12 = 0x741d)[ 6.416231] GE Tx amp AnaCal Done! (pair-1)(1e_17 = 0x2525)[ 6.463262] GE Tx amp AnaCal Done! (pair-2)(1e_19 = 0x1a22)[ 6.532923] GE Tx amp AnaCal Done! (pair-3)(1e_21 = 0x1f27)[ 6.579586] PORT 0 RX_DC_OFFSET[ 6.592237] before pairA output = 1d[ 6.597580] after pairA output = fe[ 6.602755] before pairB output = 1e[ 6.608097] after pairB output = 1[ 6.613186] before pairC output = d[ 6.618441] after pairC output = 0[ 6.623532] before pairD output = 1e[ 6.628870] after pairD output = ff[ 6.632601] mt753x gsw@0: -------- gephy-calbration (port:1) --------[ 6.647788] CALDLY = 40[ 6.728046] GE R50 AnaCal Done! (15) (0x23)(0xa3) [ 6.810313] GE R50 AnaCal Done! (15) (0x23)(0xa3) [ 6.878928] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 6.947545] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 6.955385] GE 1e_174(0xa3a3), 1e_175(0xb0b0) [ 7.006269] GE Tx offset AnaCal Done! (pair-0)(5)(0x5) 0x1e_172=0x520[ 7.030939] GE Tx offset AnaCal Done! (pair-1)(2)(0x21) 0x1e_172=0x521[ 7.055694] GE Tx offset AnaCal Done! (pair-2)(2)(0x21) 0x1e_173=0x2120[ 7.085088] GE Tx offset AnaCal Done! (pair-3)(3)(0x22) 0x1e_173=0x2122[ 7.154017] GE Tx amp AnaCal Done! (pair-0)(1e_12 = 0x5415)[ 7.214576] GE Tx amp AnaCal Done! (pair-1)(1e_17 = 0x1e1e)[ 7.267264] GE Tx amp AnaCal Done! (pair-2)(1e_19 = 0x1c24)[ 7.331267] GE Tx amp AnaCal Done! (pair-3)(1e_21 = 0x1e26)[ 7.377929] PORT 1 RX_DC_OFFSET[ 7.390582] before pairA output = e[ 7.395837] after pairA output = 1[ 7.400924] before pairB output = f[ 7.406179] after pairB output = ff[ 7.411354] before pairC output = 1e[ 7.416696] after pairC output = 0[ 7.421785] before pairD output = f[ 7.427040] after pairD output = 1[ 7.430684] mt753x gsw@0: -------- gephy-calbration (port:2) --------[ 7.445870] CALDLY = 40[ 7.507931] GE R50 AnaCal Done! (11) (0x31)(0xb1) [ 7.576543] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 7.645157] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 7.713771] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 7.721611] GE 1e_174(0xb1b0), 1e_175(0xb0b0) [ 7.772498] GE Tx offset AnaCal Done! (pair-0)(5)(0x24) 0x1e_172=0x2420[ 7.797343] GE Tx offset AnaCal Done! (pair-1)(2)(0x21) 0x1e_172=0x2421[ 7.822185] GE Tx offset AnaCal Done! (pair-2)(2)(0x21) 0x1e_173=0x2120[ 7.856129] GE Tx offset AnaCal Done! (pair-3)(4)(0x23) 0x1e_173=0x2123[ 7.925059] GE Tx amp AnaCal Done! (pair-0)(1e_12 = 0x5816)[ 7.979961] GE Tx amp AnaCal Done! (pair-1)(1e_17 = 0x1c1c)[ 8.026994] GE Tx amp AnaCal Done! (pair-2)(1e_19 = 0x1c24)[ 8.074025] GE Tx amp AnaCal Done! (pair-3)(1e_21 = 0x131b)[ 8.120687] PORT 2 RX_DC_OFFSET[ 8.133342] before pairA output = 1e[ 8.138684] after pairA output = 0[ 8.143772] before pairB output = 1e[ 8.149111] after pairB output = 0[ 8.154200] before pairC output = d[ 8.159455] after pairC output = ff[ 8.164627] before pairD output = e[ 8.169883] after pairD output = 0[ 8.173526] mt753x gsw@0: -------- gephy-calbration (port:3) --------[ 8.188713] CALDLY = 40[ 8.259874] GE R50 AnaCal Done! (13) (0x26)(0xa6) [ 8.328489] GE R50 AnaCal Done! (12) (0x30)(0xb0) [ 8.401656] GE R50 AnaCal Done! (13) (0x26)(0xa6) [ 8.465720] GE R50 AnaCal Done! (11) (0x31)(0xb1) [ 8.473561] GE 1e_174(0xa6b0), 1e_175(0xa6b1) [ 8.519896] GE Tx offset AnaCal Done! (pair-0)(4)(0x23) 0x1e_172=0x2320[ 8.544738] GE Tx offset AnaCal Done! (pair-1)(2)(0x21) 0x1e_172=0x2321[ 8.569581] GE Tx offset AnaCal Done! (pair-2)(2)(0x21) 0x1e_173=0x2120[ 8.594425] GE Tx offset AnaCal Done! (pair-3)(2)(0x21) 0x1e_173=0x2121[ 8.669013] GE Tx amp AnaCal Done! (pair-0)(1e_12 = 0x6c1b)[ 8.740886] GE Tx amp AnaCal Done! (pair-1)(1e_17 = 0x2020)[ 8.810547] GE Tx amp AnaCal Done! (pair-2)(1e_19 = 0x2028)[ 8.840611] GE Tx amp AnaCal Done! (pair-3)(1e_21 = 0x171f)[ 8.887273] PORT 3 RX_DC_OFFSET[ 8.899926] before pairA output = f[ 8.905181] after pairA output = ff[ 8.910356] before pairB output = f[ 8.915611] after pairB output = ff[ 8.920783] before pairC output = 1e[ 8.926125] after pairC output = 0[ 8.931214] before pairD output = 1e[ 8.936557] after pairD output = ff[ 8.940288] mt753x gsw@0: -------- gephy-calbration (port:4) --------[ 8.955476] CALDLY = 40[ 9.012982] GE R50 AnaCal Done! (10) (0x32)(0xb2) [ 9.072498] GE R50 AnaCal Done! (10) (0x32)(0xb2) [ 9.127459] GE R50 AnaCal Done! (9) (0x34)(0xb4) [ 9.186887] GE R50 AnaCal Done! (10) (0x32)(0xb2) [ 9.194729] GE 1e_174(0xb2b2), 1e_175(0xb4b2) [ 9.227414] GE Tx offset AnaCal Done! (pair-0)(1)(0x1) 0x1e_172=0x120[ 9.265736] GE Tx offset AnaCal Done! (pair-1)(5)(0x24) 0x1e_172=0x124[ 9.295045] GE Tx offset AnaCal Done! (pair-2)(3)(0x22) 0x1e_173=0x2220[ 9.319887] GE Tx offset AnaCal Done! (pair-3)(2)(0x21) 0x1e_173=0x2221[ 9.383160] GE Tx amp AnaCal Done! (pair-0)(1e_12 = 0x5c17)[ 9.438063] GE Tx amp AnaCal Done! (pair-1)(1e_17 = 0x1212)[ 9.490753] GE Tx amp AnaCal Done! (pair-2)(1e_19 = 0x131b)[ 9.526470] GE Tx amp AnaCal Done! (pair-3)(1e_21 = 0x161e)[ 9.573133] PORT 4 RX_DC_OFFSET[ 9.585786] before pairA output = 1d[ 9.591129] after pairA output = ff[ 9.596304] before pairB output = e[ 9.601560] after pairB output = ff[ 9.606735] before pairC output = 1d[ 9.612078] after pairC output = 0[ 9.617167] before pairD output = f[ 9.622422] after pairD output = 0[ 9.628243] UBI: auto-attach mtd9[ 9.631555] ubi0: attaching mtd9[ 9.727410] ubi0: scanning is finished[ 9.735705] ubi0: attached mtd9 (name "ubi1", size 30 MiB)[ 9.741177] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes[ 9.748032] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048[ 9.754799] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096[ 9.761740] ubi0: good PEBs: 240, bad PEBs: 0, corrupted PEBs: 0[ 9.767727] ubi0: user volume: 2, internal volumes: 1, max. volumes count: 128[ 9.774928] ubi0: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 662404348[ 9.783948] ubi0: available PEBs: 64, total reserved PEBs: 176, PEBs reserved for bad PEB handling: 19[ 9.793233] ubi0: background thread "ubi_bgt0d" started, PID 831[ 9.793774] block ubiblock0_1: created from ubi0:1(rootfs)[ 9.804692] ubiblock: device ubiblock0_1 (rootfs) set to be root filesystem[ 9.811637] hctosys: unable to open rtc device (rtc0)[ 9.829487] Failed to lock mtd obr[ 9.831810] VFS: Mounted root (squashfs filesystem) readonly on device 253:0.[ 9.842532] Freeing unused kernel memory: 448K[ 9.859397] Run /sbin/init as init process[ 10.034777] init: Console is alive[ 10.038275] init: - watchdog -[ 10.296260] kmodloader: loading kernel modules from /etc/modules-boot.d/*[ 10.318339] conninfra@(mtk_conninfra_drv_init:644) Before platform_driver_register[ 10.326025] Get Index(0-TOP_MISC_BASE) phy_addr(0x11d10000) vir_addr=(0xffffffc010a6d000) size=(0x1000)[ 10.335401] Get Index(1-TOPRGU_BASE) phy_addr(0x1001c000) vir_addr=(0xffffffc010a75000) size=(0x1000)[ 10.344598] Get Index(2-GPIO_BASE) phy_addr(0x1001f000) vir_addr=(0xffffffc010a7d000) size=(0x1000)[ 10.353621] Get Index(3-IOCFG_TR_BASE) phy_addr(0x11f00000) vir_addr=(0xffffffc010a85000) size=(0x1000)[ 10.362990] Get Index(4-IOCFG_TL_BASE) phy_addr(0x11f10000) vir_addr=(0xffffffc010a8d000) size=(0x1000)[ 10.372360] Get Index(5-INFRACFG_AO_BASE) phy_addr(0x10003000) vir_addr=(0xffffffc010a95000) size=(0x1000)[ 10.381989] Get Index(6-CONN_INFRA_CFG_BASE) phy_addr(0x18001000) vir_addr=(0xffffffc010a9d000) size=(0x1000)[ 10.391879] Get Index(7-CONN_INFRA_SYSRAM_BASE) phy_addr(0x18050000) vir_addr=(0xffffffc010aa5000) size=(0x1000)[ 10.402028] Get Index(8-CONN_INFRA_CLKGEN_ON_TOP_BASE) phy_addr(0x18009000) vir_addr=(0xffffffc010aad000) size=(0x1000)[ 10.412784] Get Index(9-CONN_HOST_CSR_TOP_BASE) phy_addr(0x18060000) vir_addr=(0xffffffc010ab5000) size=(0x1000)[ 10.422934] Get Index(10-CONN_INFRA_BUS_CR_BASE) phy_addr(0x1800e000) vir_addr=(0xffffffc010abd000) size=(0x1000)[ 10.433171] Get Index(11-CONN_INFRA_RGU_BASE) phy_addr(0x18000000) vir_addr=(0xffffffc010ac5000) size=(0x1000)[ 10.443149] Get Index(12-CONN_WT_SLP_CTL_REG_BASE) phy_addr(0x18005000) vir_addr=(0xffffffc010acd000) size=(0x1000)[ 10.453559] Get Index(13-INST2_CONN_WT_SLP_CTL_REG_BASE) phy_addr(0x18085000) vir_addr=(0xffffffc010acf000) size=(0x1000)[ 10.464487] Get Index(14-CONN_RF_SPI_MST_REG_BASE) phy_addr(0x18004000) vir_addr=(0xffffffc010ad1000) size=(0x1000)[ 10.474896] Get Index(15-INST2_CONN_RF_SPI_MST_REG_BASE) phy_addr(0x18084000) vir_addr=(0xffffffc010ad3000) size=(0x1000)[ 10.485826] Get Index(16-CONN_SEMAPHORE_BASE) phy_addr(0x18070000) vir_addr=(0xffffffc010b60000) size=(0x10000)[ 10.495889] Get Index(17-CONN_AFE_CTL_BASE) phy_addr(0x18003000) vir_addr=(0xffffffc010ad5000) size=(0x1000)[ 10.505691] Get Index(18-CONN_AFE_CTL_2ND_BASE) phy_addr(0x18083000) vir_addr=(0xffffffc010ad7000) size=(0x1000)[ 10.515841] Get Index(19-WF_TOP_SLPPROT_ON_BASE) phy_addr(0x184c0000) vir_addr=(0xffffffc010b80000) size=(0x10000)[ 10.526163] Get Index(20-WF_TOP_CFG_BASE) phy_addr(0x184b0000) vir_addr=(0xffffffc010ad9000) size=(0x1000)[ 10.535792] Get Index(21-WF_MCU_CONFIG_LS_BASE) phy_addr(0x184f0000) vir_addr=(0xffffffc010adb000) size=(0x1000)[ 10.545940] Get Index(22-WF_MCU_BUS_CR_BASE) phy_addr(0x18400000) vir_addr=(0xffffffc010add000) size=(0x1000)[ 10.555829] Get Index(23-WF_MCUSYS_INFRA_BUS_FULL_U_DEBUG_CTRL_AO_BASE) phy_addr(0x18500000) vir_addr=(0xffffffc010adf000) size=(0x1000)[ 10.568059] Get Index(24-WF_TOP_CFG_ON_BASE) phy_addr(0x184c0000) vir_addr=(0xffffffc010ba0000) size=(0x10000)[ 10.578266] [1;32meeFlashId: 0x7986, EEPROM_content_valid = 1[0m[ 10.578646] conninfra@(consys_plt_hw_init:221) tx_stream = 0x4, rx_stream = 0x4, band0_pa_type = 0x3, band1_pa_type = 0x3[ 10.595741] conninfra@(consys_plt_hw_init:230) adie_cfg_type = 2, one_adie_dbdc = 0[ 10.603382] [emi_mng_init] gConEmiPhyBase = [0x4fc00000] size = [0x100000] fw size = [0x100000] ops=[000000005f17f150][ 10.614123] conninfra@(mtk_conninfra_drv_init:650) After platform_driver_register[ 10.621852] ConnInfra Dev: init (0)[ 10.626820] conninfra@(_consys_polling_chipid_int:459) Read CONNSYS HW IP version successfully! (0x02070000)[ 10.636628] conninfra@(consys_bus_clock_ctrl:485) drv=[4] conninfra_bus_clock_wpll=[0]->[16] enable[ 10.645654] conninfra@(connsys_d_die_cfg:530) D-die efuse: 0x00000000[ 10.653109] conninfra@(_connsys_a_die_chip_id_confirm:1915) adie_idx[0]: A-die CHIP ID = 0x7976, HW Version = 0x8a20[ 10.664613] conninfra@(_connsys_a_die_chip_id_confirm:1915) adie_idx[1]: A-die CHIP ID = 0x7976, HW Version = 0x8a20[ 10.677124] conninfra@(consys_spi_write_nolock:670) addr = 0x0a00, val = 0xffffffff[ 10.685764] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.695410] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x00000000[ 10.705056] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x43a60000[ 10.718730] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008700b2, 0x00000000][ 10.730230] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.739877] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x23a6003a[ 10.749523] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x63a7003a[ 10.763196] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008700b2, 0x00000000][ 10.774696] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.784342] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x23a7003a[ 10.793989] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x63ac003a[ 10.807663] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008700b2, 0x00000000][ 10.819162] conninfra@(consys_spi_write_nolock:670) addr = 0x0038, val = 0x4a563b00[ 10.827805] conninfra@(consys_spi_write_nolock:670) addr = 0x065c, val = 0x1d59080f[ 10.836444] conninfra@(consys_spi_write_nolock:670) addr = 0x0664, val = 0x34c00fe0[ 10.846094] conninfra@(consys_spi_write_nolock:670) addr = 0x0a00, val = 0xffffffff[ 10.854734] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.864380] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x00000000[ 10.874025] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x43a60000[ 10.887700] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008800bf, 0x00000000][ 10.899199] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.908845] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x23a6003a[ 10.918492] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x63a7003a[ 10.932165] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008800bf, 0x00000000][ 10.943665] conninfra@(consys_spi_write_nolock:670) addr = 0x0144, val = 0x00000002[ 10.953311] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x23a7003a[ 10.962957] conninfra@(consys_spi_write_nolock:670) addr = 0x0148, val = 0x63ac003a[ 10.976631] conninfra@(connsys_a_die_efuse_read_nolock:906) efuse = [0x00000001, 0x00c40000, 0x008800bf, 0x00000000][ 10.988130] conninfra@(consys_spi_write_nolock:670) addr = 0x0038, val = 0x4a563b00[ 10.996770] conninfra@(consys_spi_write_nolock:670) addr = 0x065c, val = 0x1d59080f[ 11.005410] conninfra@(consys_spi_write_nolock:670) addr = 0x0664, val = 0x34c00fe0[ 11.014051] conninfra@(consys_spi_write_nolock:670) addr = 0x0070, val = 0x88888005[ 11.023649] conninfra@(consys_spi_write_nolock:670) addr = 0x0070, val = 0x00000005[ 11.032290] conninfra@(consys_spi_write_nolock:670) addr = 0x0070, val = 0x88888005[ 11.041888] conninfra@(consys_spi_write_nolock:670) addr = 0x0070, val = 0x00000005[ 11.050467] conninfra@(_consys_polling_chipid_int:459) Read CONNSYS HW IP version successfully! (0x02070000)[ 11.060268] conninfra@(_consys_hw_conninfra_wakeup:470) conninfra_wakeup refcnt=[0]->[1] wakeup!![ 11.069125] conninfra@(_consys_hw_conninfra_sleep:490) conninfra_sleep refcnt=[1]->[0] sleep!![ 11.077713] conninfra@(opfunc_power_on_internal:241) [Conninfra Pwr On] BT=[0] FM=[0] GPS=[0] WF=[0] CONNINFRA=[1][ 11.088601] Button Hotplug driver version 0.4.1[ 11.094558] mediatek_soc_hnat 15100000.hnat: wan = eth1[ 11.099790] mediatek_soc_hnat 15100000.hnat: lan = eth0[ 11.105001] mediatek_soc_hnat 15100000.hnat: ppd = eth0[ 11.110212] get_vlan_if_in_br:51 dev_get_by_name failed.[ 11.115509] mediatek_soc_hnat 15100000.hnat: gmac num = 2[ 11.120891] mediatek_soc_hnat 15100000.hnat: ppe num = 1[ 11.126538] mediatek_soc_hnat 15100000.hnat: PPE0 entry number = 8192[ 11.163368] mediatek_soc_hnat 15100000.hnat: PPE0 hwnat start[ 11.187396] hnat roaming work enable[ 11.193387] warp_module_init(): module init and register callback for warp[ 11.200287] create warp_ctrl ok!!![ 11.203709] wed_get_slot_map(): assign slot_id:0 for entry: 0![ 11.209536] wed_get_slot_map(): assign slot_id:1 for entry: 1![ 11.215712] kmodloader: done loading kernel modules from /etc/modules-boot.d/*[ 11.230184] init: - preinit -[ 11.388576] mtk_soc_eth 15100000.ethernet: [mtk_open][2701] name:eth0 dma_refcnt:0 [ 11.398944] mtk_soc_eth 15100000.ethernet: [mtk_open][2708] name:eth0 dma_refcnt:0 [ 11.406591] mtk_soc_eth 15100000.ethernet: [mtk_open][2737] name:eth0 dma_refcnt:1 [ 11.414229] mtk_soc_eth 15100000.ethernet eth0: configuring for fixed/2500base-x link mode[ 11.422528] mtk_soc_eth 15100000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/txPress the [f] key and hit [enter] to enter failsafe modePress the [1], [2], [3] or [4] key and hit [enter] to select the debug level[ 14.490612] mount_root: mounting /dev/root[ 14.758424] ubi1: attaching mtd10[ 14.915195] ubi1: scanning is finished[ 14.923637] ubi1: attached mtd10 (name "overlay", size 50 MiB)[ 14.929459] ubi1: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes[ 14.936313] ubi1: min./max. I/O unit sizes: 2048/2048, sub-page size 2048[ 14.943082] ubi1: VID header offset: 2048 (aligned 2048), data offset: 4096[ 14.950023] ubi1: good PEBs: 400, bad PEBs: 0, corrupted PEBs: 0[ 14.956010] ubi1: user volume: 1, internal volumes: 1, max. volumes count: 128[ 14.963211] ubi1: max/mean erase counter: 1/0, WL threshold: 4096, image sequence number: 2050416285[ 14.972318] ubi1: available PEBs: 0, total reserved PEBs: 400, PEBs reserved for bad PEB handling: 19[ 14.981516] ubi1: background thread "ubi_bgt1d" started, PID 936UBI device number 1, total 400 LEBs (50790400 bytes, 48.4 MiB), available 0 LEBs (0 bytes), LEB size 126976 bytes (124.0 KiB)ubimkvol: error!: UBI device doe[ 15.009571] UBIFS (ubi1:0): Mounting in unauthenticated modes not have free [ 15.015824] UBIFS (ubi1:0): background thread "ubifs_bgt1_0" started, PID 947logical eraseblocks[ 15.039418] UBIFS (ubi1:0): recovery needed[ 15.148705] UBIFS (ubi1:0): recovery completed[ 15.153181] UBIFS (ubi1:0): UBIFS: mounted UBI device 1, volume 0, name "data"[ 15.160385] UBIFS (ubi1:0): LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes[ 15.170275] UBIFS (ubi1:0): FS size: 46600192 bytes (44 MiB, 367 LEBs), journal size 2285568 bytes (2 MiB, 18 LEBs)[ 15.180683] UBIFS (ubi1:0): reserved for root: 2201041 bytes (2149 KiB)[ 15.187278] UBIFS (ubi1:0): media format: w5/r0 (latest is w5/r0), UUID D02C2546-844B-49D9-96EE-E497C2A23542, small LPT model[ 15.205708] urandom-seed: Seed file not found (/etc/urandom.seed)do_mount_bind_etc...[ 15.404888] procd: - early -[ 15.407799] procd: - watchdog -[ 15.920584] procd: - watchdog -[ 15.923826] procd: - ubus -[ 15.976693] procd: - init -/etc/rc.d/S00sysfixtime: Tue Aug 30 15:31:29 UTC 2022/etc/rc.d/S03cgroup_init: mount: mounting none on /dev/cgroup/net_cls failed: Resource busy[ 16.072839] kmodloader: loading kernel modules from /etc/modules.d/*[ 16.084797] l2tp_core: L2TP core driver, V2.0[ 16.089709] l2tp_netlink: L2TP netlink interface[ 16.094812] gre: GRE over IPv4 demultiplexor driver[ 16.100430] ip_gre: GRE over IPv4 tunneling driver[ 16.107779] ip6_gre: GRE over IPv6 tunneling driver[ 16.125687] u32 classifier[ 16.128407] input device check on[ 16.922935] mt_wifi: module license 'Proprietary' taints kernel.[ 16.928959] Disabling lock debugging due to kernel taint[ 16.965738] conninfra@(conninfra_pwr_on:120) [conninfra_pwr_on] drv=[3][ 16.973294] conninfra@(_consys_polling_chipid_int:459) Read CONNSYS HW IP version successfully! (0x02070000)[ 16.991138] [1;32mAdie Type: 0x7976[0m[ 16.991139] [1;32mSKU Type: 6000[0m[ 16.995050] conninfra@(opfunc_power_on_internal:241) [Conninfra Pwr On] BT=[0] FM=[0] GPS=[0] WF=[1] CONNINFRA=[1][ 17.009108] WiFi@C12L1,get_dbg_setting_by_profile() 5238: debug level setting=INDEX0_debug_level not found!![ 17.018933] WiFi@C12L1,get_dbg_setting_by_profile() 5261: debug option setting=INDEX0_debug_option not found!![ 17.028973] mt_rbus 0000:00:00.0: runtime IRQ mapping not provided by arch[ 17.041091] mt7986_init()-->[ 17.044002] [1;33m sku:0xf, ADIE=MT7976 [0m[ 17.048346] <--mt7986_init()[ 17.051237] RtmpRaDevCtrlInit(): MCS_LUT not used becasue MacTb size(544) > 128![ 17.058715] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX1[ 17.066016] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX2[ 17.073316] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX3[ 17.080617] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX4[ 17.087917] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX5[ 17.095218] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX6[ 17.102518] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX7[ 17.109818] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX8[ 17.117119] WiFi@C12L1,match_index_by_chipname() 507: not find chip name INDEX9[ 17.124408] WiFi@C12L2,match_index_by_chipname() 512: Not find slot id, back to old rule.[ 17.132650] msta_ifname not found[ 17.142899] -->mtfwd_init(ver:2.0)[ 17.142945] <--[ 17.146964] mtk_warp_proxy: module uses symbols from proprietary module mt_wifi, inheriting taint.[ 17.173662] ipt: xt_cgroup_MARK installed ok.[ 17.184828] xt_time: kernel timezone is -0000[ 17.190742] PPP generic driver version 2.4.2[ 17.195535] PPP MPPE Compression module registered[ 17.200790] NET: Registered protocol family 24[ 17.205664] PPTP driver version 0.8.5[ 17.210334] l2tp_ppp: PPPoL2TP kernel driver, V2.0[ 17.216061] kmodloader: done loading kernel modules from /etc/modules.d/*/etc/rc.d/S19dnsmasq: cp: can't stat '/etc/dnsmasq.d/*': No such file or directory/etc/rc.d/S19dnsmasq: sh: out of range/etc/rc.d/S19dnsmasq: sh: out of range[ 18.832993] tcp_life = 30[ 18.835699] fin_life = 30[ 18.838356] udp_life = 30[ 18.841001] Binding Threshold =5[ 20.427358] hook is going to be disabled ![ 20.462329] hook is going to be enabled ![ 20.485816] hook is going to be enabled !/etc/rc.d/S21nginx: start fcgi-cgi by spawn-fcgi./etc/rc.d/S21nginx: start nginx ok./etc/rc.d/S49messagingagent.sh: start messagingagent ok.[ 20.756066] mtk_soc_eth 15100000.ethernet eth0: Link is Down[ 20.761971] mtk_soc_eth 15100000.ethernet: [mtk_stop][2800] name:eth0 dma_refcnt:1 [ 20.769683] mtk_soc_eth 15100000.ethernet: [mtk_stop][2804] name:eth0 dma_refcnt:0 [ 20.916860] mtk_soc_eth 15100000.ethernet: [mtk_open][2701] name:eth0 dma_refcnt:0 [ 20.928149] mtk_soc_eth 15100000.ethernet: [mtk_open][2708] name:eth0 dma_refcnt:0 [ 20.935811] mtk_soc_eth 15100000.ethernet: [mtk_open][2737] name:eth0 dma_refcnt:1 [ 20.943469] mtk_soc_eth 15100000.ethernet eth0: configuring for fixed/2500base-x link mode[ 20.951796] mtk_soc_eth 15100000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/tx[ 20.955708] br-lan: port 1(eth0.1) entered blocking state[ 20.965842] br-lan: port 1(eth0.1) entered disabled state[ 20.971451] device eth0.1 entered promiscuous mode[ 20.976260] device eth0 entered promiscuous mode[ 20.981189] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready[ 20.987916] br-lan: port 1(eth0.1) entered blocking state[ 20.993353] br-lan: port 1(eth0.1) entered forwarding state[ 21.002600] br-lan: port 2(eth0.2) entered blocking state[ 21.008028] br-lan: port 2(eth0.2) entered disabled state[ 21.013718] device eth0.2 entered promiscuous mode[ 21.018627] br-lan: port 2(eth0.2) entered blocking state[ 21.024040] br-lan: port 2(eth0.2) entered forwarding state[ 21.031390] br-lan: port 3(eth0.3) entered blocking state[ 21.036792] br-lan: port 3(eth0.3) entered disabled state[ 21.042656] device eth0.3 entered promiscuous mode[ 21.047592] br-lan: port 3(eth0.3) entered blocking state[ 21.053019] br-lan: port 3(eth0.3) entered forwarding state[ 21.061026] br-lan: port 4(eth0.4) entered blocking state[ 21.066468] br-lan: port 4(eth0.4) entered disabled state[ 21.072061] device eth0.4 entered promiscuous mode[ 21.076981] br-lan: port 4(eth0.4) entered blocking state[ 21.082390] br-lan: port 4(eth0.4) entered forwarding state[ 21.089804] br-lan: port 5(eth0.6) entered blocking state[ 21.095269] br-lan: port 5(eth0.6) entered disabled state[ 21.100900] device eth0.6 entered promiscuous mode[ 21.105881] br-lan: port 5(eth0.6) entered blocking state[ 21.111304] br-lan: port 5(eth0.6) entered forwarding state[ 21.141883] mtk_soc_eth 15100000.ethernet: [mtk_open][2701] name:eth1 dma_refcnt:1 [ 21.149606] mtk_soc_eth 15100000.ethernet: [mtk_open][2737] name:eth1 dma_refcnt:2 [ 21.157273] mtk_soc_eth 15100000.ethernet eth1: configuring for fixed/2500base-x link mode[ 21.165658] mtk_soc_eth 15100000.ethernet eth1: Link is Up - 2.5Gbps/Full - flow control rx/tx[ 21.209779] hnat_priv ppd = eth0.6[ 21.308666] WiFi@C01L2,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 21.317024] msta_ifname not found[ 21.320991] warp_cap_support(): chip_id=7986 is in WHNAT support list[ 21.327436] warp_entry_acquire(): bus slot:0, hook to WARP, entry id=0, entry: 00000000f4abf896[ 21.336143] client_hif_specific_get(): hw->base_phy_addr 0x18000000!![ 21.342748] warp_entry_get_by_pdev(): return entry[0] [ 21.347984] warp_msg_register():warp,pid,2906,id,0,wed_idx,0[ 21.353738] wed_init(0): res_start = 0x15010000, size = 1000, irq=6,base_addr=0xffffffc01120b000[ 21.363009] wed_ring_init(): wed tx ring init result = 0[ 21.369023] wed_ring_init(): wed rx ring init result = 0[ 21.378966] GetEntryFromFreeList: allocated new pool[ 21.385744] GetEntryFromFreeList: allocated new pool[ 21.392376] GetEntryFromFreeList: allocated new pool[ 21.398635] GetEntryFromFreeList: allocated new pool[ 21.406045] create wed ok!!![ 21.409022] wdma_init(): wdma(0) base_addr=0xffffffc01128d800, base_phy_addr=0x15104800[ 21.417872] warp_woif_bus_init_hw(): bus:000000008d656138, txring: 20, pa: 0x00000000546b8000, 0x00000000546b8000, 24, 28, 3c[ 21.429238] warp_woif_bus_init_hw(): bus:000000008d656138, rxring: 50, pa: 0x00000000546ba000, 0x00000000546ba000, 54, 58, 6c[ 21.440589] get_region_info(): wed_idx = 0, base_addr = 0x000000004a084e42, size = 0x40000, res.start = 0x4fd00000, shared:0[ 21.451837] get_region_info(): wed_idx = 0, base_addr = 0x00000000ab583308, size = 0x8000, res.start = 0x151e0000, shared:0[ 21.463024] get_region_info(): wed_idx = 0, base_addr = 0x000000009dd17c6b, size = 0x240000, res.start = 0x4fd80000, shared:1[ 21.474359] get_region_info(): wed_idx = 0, base_addr = 0x00000000068dd5be, size = 0x1000, res.start = 0x15194000, shared:0[ 21.485480] warp_fwdl_mcu_mode(): mcu mode, need fwdl[ 21.496498] ########## WO Firmware ##########[ 21.500878] Chip ID: 0x0000[ 21.503667] ECO version:0[ 21.506280] Version: DEV_000000[ 21.509427] Build date: 20220519213044[ 21.513184] Total region:3[ 21.515888] #################################[ 21.520243] Parsing tailer region 0[ 21.523723] Target address: 0x151e0000[ 21.527548] Download size: 20400[ 21.530875] Parsing tailer region 1[ 21.534368] Target address: 0x4fd00000[ 21.538219] Download size: 87072[ 21.541621] Parsing tailer region 2[ 21.545125] Target address: 0x4fd80000[ 21.548970] Download size: 2283984[ 21.554631] warp_fwdl_ready_check_mcu_mode(): waiting for wocpu[ 21.580521] warp_fwdl_ready_check_mcu_mode(): wocpu is ready[ 21.586250] warp_woctrl_init_state(), wo_state: WO_STATE_ENABLE[ 21.592191] wo_proc_init done 00000000585998e4[ 21.596728] wo_exep_proc_init done 00000000585998e4[ 21.601740] wo_exception_init(0): exp log= 0x00000000f709e1bc, phy_addr= 0x0000000054360000 size= 32768[ 21.611399] warp_probe(): probe fail since warp is full![ 21.616750] warp_dev0: probe of 15010000.wed2 failed with error -1[ 21.627476] WiFi@C02L1,HwCtrlInit() 500: ser_init() return NDIS_STATUS_FAILURE[ 21.693491] IFNAME[0]=wl1[ 21.696389] IFNAME[1]=wl14[ 21.699158] IFNAME[2]=wl13[ 21.702041] IFNAME[3]=wl0[ 21.704818] IFNAME[4]=wl5[ 21.707573] IFNAME[5]=wl9[ 21.710313] IFNAME[6]=wl15[ 21.713133] RTMPSetProfileParameters(): Mbssid[0] miwifi_mesh = 0[ 21.719237] RTMPSetProfileParameters(): Mbssid[1] miwifi_mesh = 0[ 21.725348] RTMPSetProfileParameters(): Mbssid[2] miwifi_mesh = 0[ 21.731443] RTMPSetProfileParameters(): Mbssid[3] miwifi_mesh = 0[ 21.737551] RTMPSetProfileParameters(): Mbssid[4] miwifi_mesh = 0[ 21.743640] RTMPSetProfileParameters(): Mbssid[5] miwifi_mesh = 0[ 21.749735] RTMPSetProfileParameters(): Mbssid[6] miwifi_mesh = 0[ 21.755923] RTMPSetProfileParameters(): Mbssid[0] backhaul = 0[ 21.761762] RTMPSetProfileParameters(): Mbssid[1] backhaul = 0[ 21.767593] RTMPSetProfileParameters(): Mbssid[2] backhaul = 0[ 21.773435] RTMPSetProfileParameters(): Mbssid[3] backhaul = 0[ 21.779277] RTMPSetProfileParameters(): Mbssid[4] backhaul = 1[ 21.785118] RTMPSetProfileParameters(): Mbssid[5] backhaul = 0[ 21.790952] RTMPSetProfileParameters(): Mbssid[6] backhaul = 0[ 21.796894] RTMPSetProfileParameters(): Mbssid[0] mimesh_ver = 0[ 21.802895] RTMPSetProfileParameters(): Mbssid[1] mimesh_ver = 0[ 21.808889] RTMPSetProfileParameters(): Mbssid[2] mimesh_ver = 0[ 21.814895] RTMPSetProfileParameters(): Mbssid[3] mimesh_ver = 4[ 21.820896] RTMPSetProfileParameters(): Mbssid[4] mimesh_ver = 4[ 21.826899] RTMPSetProfileParameters(): Mbssid[5] mimesh_ver = 0[ 21.832898] RTMPSetProfileParameters(): Mbssid[6] mimesh_ver = 0[ 21.838994] RTMPSetProfileParameters(): mesh_apmac = 24:CF:24:C3:BA:E4[ 21.845629] RTMPSetProfileParameters(): mimesh_aplimit = 9[ 21.851209] RTMPSetProfileParameters(): mimesh_id = 0x355e73f9[ 21.857123] RTMPSetProfileParameters: mesh_model = RB06[ 21.862801] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS0 PhyMode=78[ 21.869409] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS1 PhyMode=78[ 21.876009] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS2 PhyMode=78[ 21.882610] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS3 PhyMode=177[ 21.889302] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS4 PhyMode=177[ 21.896006] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS5 PhyMode=177[ 21.902699] WiFi@C12L1,RTMPWirelessModeCfg() 587: Init: BSS6 PhyMode=177[ 21.909628] WiFi@C23L2,auto_ch_select_set_cfg() 3398: BandIdx0, AutoChannelAtBootup=1, AutoChannelAlg = 3[ 21.919180] WiFi@C23L2,auto_ch_select_set_cfg() 3398: BandIdx1, AutoChannelAtBootup=1, AutoChannelAlg = 3[ 21.965317] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=0, Desired MFPC=0[ 21.972727] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=1, Desired MFPC=0[ 21.980115] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=2, Desired MFPC=0[ 21.987516] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=3, Desired MFPC=0[ 21.994902] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=4, Desired MFPC=0[ 22.002284] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=5, Desired MFPC=0[ 22.009705] WiFi@C15L1,Set_PMFMFPC_Proc() 1722: [PMF] :: apidx=6, Desired MFPC=0[ 22.018471] WiFi@C12L1,RTMPSetProfileParameters() 8263: wl1, QoSMgmtCapa=0[ 22.025352] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.032481] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.039630] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.046772] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.053910] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.061049] WiFi@C12L1,RTMPSetProfileParameters() 8263: (null), QoSMgmtCapa=0[ 22.072873] WiFi@C12L1,rtmp_read_ap_client_from_file() 1566: APCLI[0] ApCliMuMimoDlEnable = 0[ 22.081401] WiFi@C12L1,rtmp_read_ap_client_from_file() 1566: APCLI[1] ApCliMuMimoDlEnable = 0/etc/rc.d/S60iwe[ 22.090050] WiFi@C12L1,rtmp_read_ap_client_from_file() 1585: APCLI[0] ApCliMuMimoUlEnable = 0ventd: iwevent-c[ 22.099835] WiFi@C12L1,rtmp_read_ap_client_from_file() 1585: APCLI[1] ApCliMuMimoUlEnable = 0all start ok[ 22.111160] WiFi@C03L1,AndesSendCmdMsg() 754: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD[ 22.122406] WiFi@C03L2,AndesSendCmdMsg() 765: Command type = ed, Extension command type = 48[ 22.130899] WiFi@C03L1,AndesSendCmdMsg() 754: Could not send in band command due to diablefRTMP_ADAPTER_MCU_SEND_IN_BAND_CMD[ 22.142124] WiFi@C03L2,AndesSendCmdMsg() 765: Command type = ed, Extension command type = 48[ 22.207923] wdma_dma_ctrl(): WDMA_GLO_CFG=50404e70, txrx = 0[ 22.219472] wdma_dma_ctrl(): WDMA_GLO_CFG=40404e70, txrx = 0[ 22.233710] warp_tx_ring_init_hw(): configure ring 0 setting[ 22.239381] warp_tx_ring_init_hw(): wed:00000000c8bd214a wifi:000000001ef037cc: 24420=5cb38000,24424=2048,24428=0[ 22.249646] warp_tx_ring_init_hw(): configure ring 1 setting[ 22.255334] warp_tx_ring_init_hw(): wed:00000000c8bd214a wifi:000000001ef037cc: 24430=55c90000,24434=2048,24438=0[ 22.265707] set_rrocfg,0[ 22.291117] wdma_dma_ctrl(): WDMA_GLO_CFG=40404e74, txrx = 3[ 22.296970] [1;33m sku:0xf, ADIE=MT7976 [0m[ 22.301359] using E1 ROM patch[ 22.304424] using E1 RAM[ 22.306957] current sync CR = 0x1[ 22.310271] Built date: 20220519212529a[ 22.314213] Platform: ALPS[ 22.317024] HW/SW version: 0x8a108a10[ 22.320788] Patch version: 0xffffffff[ 22.330881] current sync CR = 0x1[ 22.334219] Chip ID: 0x0f[ 22.336954] Eco version: 0x00[ 22.340044] Region number: 0x0b[ 22.343261] Format version: 0x02[ 22.346577] Format flag: 0x01[ 22.349627] Ram version: ____000000[ 22.353216] Built date: 20220519212633[ 22.357081] Common crc: 0xb8995b85[ 22.360580] Release info: header tag = 0, total length = 108[ 22.366343] tag 1, padding length = 1, tag length = 103[ 22.371655] payload: t-neptune-main-2111-7986-imp_backup_wk2213-MT7986_E1_ASIC_ROM_RAM_REBB_IMP_BACKUP_WK2213-20220519212500[ 22.401527] Chip ID: 0x00[ 22.404239] Eco version: 0x00[ 22.407277] Region number: 0x03[ 22.410499] Format version: 0x02[ 22.413803] Format flag: 0x01[ 22.416845] Ram version: DEV_000000[ 22.420411] Built date: 20220519213028[ 22.424238] Common crc: 0x962f9340[ 22.427715] Release info: header tag = 0, total length = 0[ 22.527065] current sync CR = 0x7[ 22.530394] efuse_probe: efuse = deaddead[ 22.538987] [1;33m sku:0xf, ADIE=MT7976 [0m[ 22.544927] WiFi@C02L1,is_cal_free_ic() 1004: [41mis_cal_free_ic(1004) offset:1000, 0,0 [m[ 22.553354] [1;33m sku:0xf, ADIE=MT7976 [0m[ 22.571560] [1;33m sku:0xf, ADIE=MT7976 [0m[ 22.589943] WiFi@C02L1,is_cal_free_ic() 1023: [41m iCal free[m[ 22.595934] [1;33m sku:0xf, ADIE=MT7976 [0m[ 26.458989] WiFi@C17L1,RTMPReadTxPwrPerRate() 450: (450): Don't Support this now![ 26.466505] WiFi@C01L1,AntCfgInit() 3020: Not support for HIF_MT yet![ 26.486540] ch_switch_monitor_state_machine_init:: enter[ 26.491851] ch_switch_monitor_cfg_reset:: enter[ 26.496375] ch_switch_monitor_cfg_reset:: enter[ 26.501199] WiFi@C17L1,tx_pwr_comp_init() 641: NotSupportYet![ 26.507091] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 26.512566] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 26.518126] WiFi@C14L1,IPMacTable_init() 348: IPMacTable already inited![ 26.544941] wdma_dma_ctrl(): WDMA_GLO_CFG=58804e75, txrx = 3[ 26.550676] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 26.556160] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 26.561589] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.571484] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13447: DAT config band(0) cck_timeout Fail![ 26.580163] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.590054] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13458: DAT config band(0) ofdm_timeout Fail![ 26.598818] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.608710] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13469: DAT config band(0) ofdma_timeout Fail![ 26.617561] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.627452] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13447: DAT config band(1) cck_timeout Fail![ 26.636131] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.646023] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13458: DAT config band(1) ofdm_timeout Fail![ 26.654787] WiFi@C00L1,set_ack_timeout_mode_byband() 13359: CTS/ACK Timeout Range should between [0xFFFF:0]!![ 26.664678] WiFi@C00L1,set_datcfg_ack_cts_timeout() 13469: DAT config band(1) ofdma_timeout Fail![ 26.673584] mbss_create_vif: ifidx(1) idbss(1) final_name(wl14)[ 26.679989] mbss_create_vif: ifidx(2) idbss(2) final_name(wl13)[ 26.686732] mbss_create_vif: ifidx(1) idbss(4) final_name(wl5)[ 26.693210] mbss_create_vif: ifidx(2) idbss(5) final_name(wl9)[ 26.699584] mbss_create_vif: ifidx(3) idbss(6) final_name(wl15)[ 26.706617] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 26.714848] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 26.920495] :(op = 0)[ 26.922775] WiFi@C00L2,red_tail_drop_init() 83: red_tail_drop_init: available token:8192, whnat_en:1[ 26.931901] WiFi@C00L1,MtCmdCr4RedSet() 913: MtCmdCr4RedSet: (ret = 0)[ 26.938416] WiFi@C00L1,SendRedCmd() 1048: SendRedCmd:(ret = 1)[ 26.944358] WiFi@C01L2,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 26.952348] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 0[ 26.957922] WiFi@C23L1,DfsBuildChannelList() 3295: [RDM]: wdev is not 5G.[ 26.964723] [RadarStateCheck] Zero Wait State: 0[ 26.969328] phy_freq_adjust : no prim_ch value for adjust![ 26.974998] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 26.982991] wdev_attr_update(): wdevId0 = 24:cf:24:c3:ba:e5[ 26.988573] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band0 group_idx[0]=0, bw_grp=16 omac=0[ 26.997688] WiFi@C23L1,HcGetBandByChannel() 1102: No hdev parking on channel:0, just return a default band_idx 0![ 27.007935] WiFi@C02L2,AsicRadioOnOffCtrl() 2279: DbdcIdx=0 RadioOn[ 27.014728] WiFi@C00L2,ApAutoChannelAtBootUp() 289: ----------------->[ 27.021336] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 27.026812] WiFi@C03L1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 27.032405] WiFi@C08L1,UpdateBeaconHandler() 1979: wdev(0) bss not ready (state:0, caller:MTAPAutoSelectChannel+0x108/0x490 [mt_wifi])!![ 27.044711] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=1, ctrl_ch2=0, cent_ch=1 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 27.291616] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=2, ctrl_ch2=0, cent_ch=2 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 27.535623] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=3, ctrl_ch2=0, cent_ch=3 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 27.779613] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=4, ctrl_ch2=0, cent_ch=4 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 28.023629] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=5, ctrl_ch2=0, cent_ch=5 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 28.267614] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=6, ctrl_ch2=0, cent_ch=6 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 28.511646] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=7, ctrl_ch2=0, cent_ch=7 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 28.755610] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=8, ctrl_ch2=0, cent_ch=8 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 28.999614] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=9, ctrl_ch2=0, cent_ch=9 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 29.243607] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=10, ctrl_ch2=0, cent_ch=10 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 29.487609] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=11, ctrl_ch2=0, cent_ch=11 DBDCIdx=0, ChBand=0, BW=0, TXStream=4, RXStream=4, scan(1)[ 29.731791] WiFi@C08L1,UpdateBeaconHandler() 1979: wdev(0) bss not ready (state:0, caller:MTAPAutoSelectChannel+0x2d0/0x490 [mt_wifi])!![ 29.744036] WiFi@C23L2,SelectClearChannelBusyTime() 1845: ====================================================================[ 29.755408] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 1 : Busy Time = 9330, Skip Channel = FALSE, BwCap = TRUE[ 29.766774] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 2 : Busy Time = 5782, Skip Channel = FALSE, BwCap = TRUE[ 29.778140] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 3 : Busy Time = 14151, Skip Channel = FALSE, BwCap = TRUE[ 29.789506] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 4 : Busy Time = 12141, Skip Channel = FALSE, BwCap = TRUE[ 29.800872] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 5 : Busy Time = 6450, Skip Channel = FALSE, BwCap = TRUE[ 29.812236] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 6 : Busy Time = 6668, Skip Channel = FALSE, BwCap = TRUE[ 29.823602] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 7 : Busy Time = 2381, Skip Channel = FALSE, BwCap = TRUE[ 29.834973] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 8 : Busy Time = 2626, Skip Channel = FALSE, BwCap = TRUE[ 29.846340] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 9 : Busy Time = 2291, Skip Channel = FALSE, BwCap = TRUE[ 29.857705] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 10 : Busy Time = 4446, Skip Channel = FALSE, BwCap = TRUE[ 29.869071] WiFi@C23L2,SelectClearChannelBusyTime() 1851: Channel 11 : Busy Time = 7567, Skip Channel = FALSE, BwCap = TRUE[ 29.880435] WiFi@C23L2,SelectClearChannelBusyTime() 1854: ====================================================================[ 29.891806] WiFi@C23L2,SelectClearChannelBusyTime() 2088: Rule 3 Channel Busy time value : Select Primary Channel 9[ 29.902219] WiFi@C23L2,SelectClearChannelBusyTime() 2090: Rule 3 Channel Busy time value : Min Channel Busy = 2291[ 29.912545] WiFi@C23L2,SelectClearChannelBusyTime() 2095: Rule 3 Channel Busy time value : BW = 20[ 29.921486] WiFi@C23L2,SelectClearChannelBusyTime() 2129: [SelectClearChannelBusyTime] - band0 END[ 29.930451] WiFi@C23L1,operate_loader_phy() 401: oper_radio after decision: bw(1), prim_ch(9), cen_ch_1(11), cen_ch_2(0)![ 29.941444] WiFi@C03L2,MtCmdChannelSwitch() 2530: ctrl_chl=9, ctrl_ch2=0, cent_ch=11 DBDCIdx=0, ChBand=0, BW=1, TXStream=4, RXStream=4, scan(0)[ 30.242880] WiFi@C23L1,DfsBuildChannelList() 3295: [RDM]: wdev is not 5G.[ 30.249662] WiFi@C23L2,zero_wait_dfs_switch_ch() 779: outband ch 0, ch_stat 0[ 30.257002] WiFi@C08L2,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:0, CfgMode:0[ 30.267532] WiFi@C15L2,APPMFInit() 133: [PMF] apidx=0, MFPC=0, MFPR=0, SHA256=0[ 30.275065] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 30.282608] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(0)[ 30.291206] WiFi@C01L2,wifi_sys_linkup() 1128: wdev idx = 0[ 30.342112] WiFi@C03L1,bssUpdateChannel() 3734: ucPrimCh=9, ucCentChSeg0=11, ucCentChSeg1=0, BW=1, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 30.358258] WiFi@C00L1,TxCCKStreamCtrl() 21350: set wrong parameters[ 30.373576] PrintSrCmd:[ 30.373576] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.373576] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.387546] PrintSrCmd:[ 30.387546] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.387546] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 30.401514] PrintSrCmd:[ 30.401514] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.401514] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.415480] PrintSrCmd:[ 30.415480] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.415480] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.429586] main_virtual_if_open(): net_device wl1 ifindex(10) up![ 30.430389] [mtf_txpower_all_rate_info] band_idx:0 pwr:48 ChBand:2G ePAGain:0[ 30.435756] mtk_ppe_dev_register_hook : ineterface wl1 register (1)[ 30.450129] ip_acc_add_table(534): add succ (lan: 0)![ 30.452055] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl13[ 30.455239] account_init succ![ 30.461303] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 30.472682] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 30.480972] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 2[ 30.486721] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(1), prim_ch(9), cen_ch_1(11), cen_ch_2(0)!/etc/rc.d/S77tra[ 30.498350] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi]fficd: refresh i[ 30.507436] wdev_attr_update(): wdevId2 = 26:cf:24:a3:ba:e5fname into ipaac[ 30.514384] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band0 group_idx[2]=9, bw_grp=16 omac=17ount in [lan-dev[ 30.525066] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=0 RadioOn 5g-wl 2.4g-wl w[ 30.533354] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->l-guest 5g-wl-ba[ 30.541068] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)ckhaul]/etc/rc[ 30.547904] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0).d/S77trafficd: [ 30.554855] 7986@C00L1wl1,ApAutoChannelAtBootUp() 424: not A bandeth0 wl0 wl1 wl2[ 30.562249] 7986@C08L1wl1,ap_run_at_boot() 537: [41m ACS is disable !![m wl14 wl15 wl5[ 30.570760] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:2, CfgMode:0/etc/rc.d/S77tra[ 30.582725] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=2, MFPC=0, MFPR=0, SHA256=0fficd: trafficd [ 30.591879] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi]start ok[ 30.600605] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(2)/etc/rc.d/S90mos[ 30.609797] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 2quitto: /etc/r[ 30.617327] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=9, ucCentChSeg0=11, ucCentChSeg1=0, BW=1, ucHetbRU26Disable=0, ucHetbAllDisable=1c.d/S90mosquitto: [ 30.635403] 7986@C00L1wl1,TxCCKStreamCtrl() 21350: set wrong parameters[ 30.651031] PrintSrCmd:[ 30.651031] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.651031] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.665055] PrintSrCmd:[ 30.665055] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.665055] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 30.679086] PrintSrCmd:[ 30.679086] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.679086] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.693063] PrintSrCmd:[ 30.693063] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 30.693063] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 30.707190] mbss_virtual_if_open(): net_device wl13 ifindex(19) open![ 30.713638] [mtf_txpower_all_rate_info] band_idx:0 pwr:48 ChBand:2G ePAGain:0[ 30.720764] mtk_ppe_dev_register_hook : ineterface wl13 register (2)[ 30.727772] br-miot: port 1(wl13) entered blocking state[ 30.733090] br-miot: port 1(wl13) entered disabled state[ 30.738583] device wl13 entered promiscuous mode[ 30.743564] set_no_bcn(): net_device wl1 ifindex(10) up![ 30.748919] set_no_bcn(): Set no beacon as:0[ 30.753313] br-miot: port 1(wl13) entered blocking state[ 30.758644] br-miot: port 1(wl13) entered forwarding state[ 30.768028] br-lan: port 6(wl1) entered blocking state[ 30.773220] br-lan: port 6(wl1) entered disabled state[ 30.778589] device wl1 entered promiscuous mode[ 30.783269] br-lan: port 6(wl1) entered blocking state[ 30.788429] br-lan: port 6(wl1) entered forwarding state[ 30.807171] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl14[ 30.813372] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 30.821750] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 30.830011] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 1[ 30.835669] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(1), prim_ch(9), cen_ch_1(11), cen_ch_2(0)!/etc/rc.d/S90mos[ 30.847210] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi]quitto: [ 30.856357] wdev_attr_update(): wdevId1 = 26:cf:24:93:ba:e5[ 30.862720] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band0 group_idx[1]=10, bw_grp=16 omac=18[ 30.872009] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=0 RadioOn/etc/rc.d/S90mos[ 30.879304] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->quitto: [ 30.886863] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 30.893366] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 30.899040] 7986@C00L1wl1,ApAutoChannelAtBootUp() 424: not A band[ 30.905186] 7986@C08L1wl1,ap_run_at_boot() 537: [41m ACS is disable !![m[ 30.912308] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:1, CfgMode:0[ 30.923126] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=1, MFPC=0, MFPR=0, SHA256=0[ 30.930985] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 30.938610] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(1)[ 30.947233] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 1/etc/rc.d/S90mosquitto: /etc/rc.d/S90mosquitto: /tmp/mq/cc/xiaoqiang_ct: OK/etc/rc.d/S90mosquitto: /etc/rc.d/S90mosquitto: [ 30.998837] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=9, ucCentChSeg0=11, ucCentChSeg1=0, BW=1, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 31.016069] 7986@C00L1wl1,TxCCKStreamCtrl() 21350: set wrong parameters[ 31.031742] PrintSrCmd:[ 31.031742] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 31.031742] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 31.045973] PrintSrCmd:[ 31.045973] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 31.045973] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 31.060028] PrintSrCmd:[ 31.060028] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 31.060028] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 31.074059] PrintSrCmd:[ 31.074059] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 0, u1Status = 0[ 31.074059] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[port_service] i[ 31.088327] mbss_virtual_if_open(): net_device wl14 ifindex(18) open!nit services fin[ 31.096029] [mtf_txpower_all_rate_info] band_idx:0 pwr:48 ChBand:2G ePAGain:0ish[ 31.104558] mtk_ppe_dev_register_hook : ineterface wl14 register (3)/etc/init.d/network: Command failed: Not found[ 31.137849] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl0[ 31.143954] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 31.152333] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 31.160629] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 3[ 31.166485] [RadarStateCheck] Zero Wait State: 0[ 31.171151] 7986@C23L2wl1,RadarStateCheck() 292: [1;33m RD_NORMAL_MODE [m [ 31.178214] phy_freq_adjust : no prim_ch value for adjust![ 31.184024] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 31.192046] wdev_attr_update(): wdevId3 = 24:cf:24:c3:ba:e6[ 31.197682] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band1 group_idx[3]=4, bw_grp=16 omac=0[ 31.207994] 7986@C23L1wl1,HcGetBandByChannel() 1102: No hdev parking on channel:0, just return a default band_idx 0![ 31.218655] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=0 RadioOn[port_service] r[ 31.225856] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->ebuild map finis[ 31.233613] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)h[ 31.240677] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 31.246450] 7986@C23L2wl1,AutoChSelBuildChannelListFor56G() 2702: ChListNum56G = 13[ 31.254467] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(3) bss not ready (state:0, caller:MTAPAutoSelectChannel+0x108/0x490 [mt_wifi])!![ 31.267093] 7986@C03L2wl1,MtCmdChannelSwitch() 2530: ctrl_chl=36, ctrl_ch2=0, cent_ch=36 DBDCIdx=1, ChBand=1, BW=0, TXStream=4, RXStream=4, scan(1)[port_service] remove vlan finish[port_service] LIST_VID = -1[ 31.318777] clean port 1 ifname[ 31.322004] set port 1 ifname eth0.1[port_service] create switch vlan: switch=switch0, ports=1 6t, vid=1[port_service] create if: eth0.1[ 31.348747] clean port 2 ifname[ 31.351976] set port 2 ifname eth0.2[port_service] create switch vlan: switch=switch0, ports=2 6t, vid=2[port_service] create if: eth0.2[ 31.383614] clean port 3 ifname[ 31.386879] set port 3 ifname eth0.3[port_service] create switch vlan: switch=switch0, ports=3 6t, vid=3[port_service] create if: eth0.3[ 31.426084] clean port 4 ifname[ 31.429311] set port 4 ifname eth0.4[port_service] create switch vlan: switch=switch0, ports=4 6t, vid=4[port_service] create if: eth0.4[port_service] create switch vlan: switch=switch0, ports=, vid=5[port_service] create if: eth1.5[port_service] create if: eth0.6[port_service] reconfig vlan finish[ 31.523678] 7986@C03L2wl1,MtCmdChannelSwitch() 2530: ctrl_chl=40, ctrl_ch2=0, cent_ch=40 DBDCIdx=1, ChBand=1, BW=0, TXStream=4, RXStream=4, scan(1)[ 31.779628] 7986@C03L2wl1,MtCmdChannelSwitch() 2530: ctrl_chl=44, ctrl_ch2=0, cent_ch=44 DBDCIdx=1, ChBand=1, BW=0, TXStream=4, RXStream=4, scan(1)[ 32.035675] 7986@C03L2wl1,MtCmdChannelSwitch() 2530: ctrl_chl=48, ctrl_ch2=0, cent_ch=48 DBDCIdx=1, ChBand=1, BW=0, TXStream=4, RXStream=4, scan(1)[ 32.143378] BcnCheck start after 3300 ms (wl1)[ 32.148238] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(3) bss not ready (state:0, caller:update_ap_qload_to_bcn+0xa0/0xc8 [mt_wifi])!![ 32.291807] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(3) bss not ready (state:0, caller:MTAPAutoSelectChannel+0x2d0/0x490 [mt_wifi])!![ 32.304315] 7986@C23L2wl1,SelectClearChannelBusyTime() 1845: ====================================================================[ 32.315944] 7986@C23L2wl1,SelectClearChannelBusyTime() 1851: Channel 36 : Busy Time = 43, Skip Channel = FALSE, BwCap = TRUE[ 32.327569] 7986@C23L2wl1,SelectClearChannelBusyTime() 1851: Channel 40 : Busy Time = 1918, Skip Channel = FALSE, BwCap = TRUE[ 32.339194] 7986@C23L2wl1,SelectClearChannelBusyTime() 1851: Channel 44 : Busy Time = 168, Skip Channel = FALSE, BwCap = TRUE[ 32.350824] 7986@C23L2wl1,SelectClearChannelBusyTime() 1851: Channel 48 : Busy Time = 57, Skip Channel = FALSE, BwCap = TRUE[ 32.362460] 7986@C23L2wl1,SelectClearChannelBusyTime() 1854: ====================================================================[ 32.374094] 7986@C23L2wl1,SelectClearChannelBusyTime() 2088: Rule 3 Channel Busy time value : Select Primary Channel 36[ 32.384852] 7986@C23L2wl1,SelectClearChannelBusyTime() 2090: Rule 3 Channel Busy time value : Min Channel Busy = 1918[ 32.395437] 7986@C23L2wl1,SelectClearChannelBusyTime() 2095: Rule 3 Channel Busy time value : BW = 160[ 32.404724] 7986@C23L2wl1,SelectClearChannelBusyTime() 2129: [SelectClearChannelBusyTime] - band1 END[ 32.413942] [RadarStateCheck] Zero Wait State: 0[ 32.418551] 7986@C23L2wl1,RadarStateCheck() 258: [1;33m RD_SILENCE_MODE [m [ 32.425685] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(3), prim_ch(36), cen_ch_1(50), cen_ch_2(0)![ 32.436963] new DFSchannel 52 not pre dfs channel[ 32.441743] 7986@C23L2wl1,DfsCacNormalStart() 3204: [RDM] CAC 65 seconds start . Disable MAC TX[ 32.450499] 7986@C03L2wl1,MtCmdChannelSwitch() 2530: ctrl_chl=36, ctrl_ch2=0, cent_ch=50 DBDCIdx=1, ChBand=1, BW=3, TXStream=4, RXStream=4, scan(0)[ 32.500015] 7986@C23L2wl1,zero_wait_dfs_switch_ch() 779: outband ch 0, ch_stat 0[ 32.507408] 7986@C23L2wl1,zero_wait_dfs_switch_ch() 786: bDedicatedZeroWaitDefault == 0[ 32.515627] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:3, CfgMode:0[ 32.526411] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=3, MFPC=0, MFPR=0, SHA256=0[ 32.534202] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 32.541762] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(3)[ 32.550358] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 3[ 32.601584] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 32.629073] PrintSrCmd:[ 32.629073] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 32.629073] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 32.643047] PrintSrCmd:[ 32.643047] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 32.643047] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 32.657018] PrintSrCmd:[ 32.657018] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 32.657018] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 32.670987] PrintSrCmd:[ 32.670987] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 32.670987] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 32.685093] mbss_virtual_if_open(): net_device wl0 ifindex(20) open![ 32.685896] [mtf_txpower_all_rate_info] band_idx:1 pwr:47 ChBand:5G ePAGain:0[ 32.691443] mtk_ppe_dev_register_hook : ineterface wl0 register (4)[ 32.711127] br-lan: port 7(wl0) entered blocking state[ 32.716294] br-lan: port 7(wl0) entered disabled state[ 32.721644] device wl0 entered promiscuous mode[ 32.726308] br-lan: port 7(wl0) entered blocking state[ 32.731457] br-lan: port 7(wl0) entered forwarding state[ 32.751222] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl5[ 32.757213] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 32.765668] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 32.773946] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 4[ 32.779686] [RadarStateCheck] Zero Wait State: 0[ 32.779896] [wandt filter] init success![ 32.784319] 7986@C23L2wl1,RadarStateCheck() 258: [1;33m RD_SILENCE_MODE [m [ 32.795382] 7986@C23L2wl1,RadarStateCheck() 269: [1;33m mode=2, pDot11h->RDCount=4 [m [ 32.803481] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(3), prim_ch(36), cen_ch_1(50), cen_ch_2(0)![ 32.815031] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 32.823038] wdev_attr_update(): wdevId4 = 26:cf:24:c3:ba:e5[ 32.828640] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band1 group_idx[4]=25, bw_grp=16 omac=17[ 32.839205] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=1 RadioOn[ 32.846480] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->[ 32.853370] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 32.859112] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 32.864758] 7986@C00L1wl1,ApAutoChannelAtBootUp() 418: zero-wait DFS is not enabled[ 32.872396] 7986@C08L1wl1,ap_run_at_boot() 537: [41m ACS is disable !![m[ 32.879474] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:4, CfgMode:0[ 32.890258] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=4, MFPC=0, MFPR=0, SHA256=0[ 32.898083] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 32.905640] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(4)[ 32.914239] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 4[ 32.965547] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 32.993551] PrintSrCmd:[ 32.993551] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 32.993551] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.007527] PrintSrCmd:[ 33.007527] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.007527] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 33.021500] PrintSrCmd:[ 33.021500] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.021500] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.035473] PrintSrCmd:[ 33.035473] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.035473] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.049560] mbss_virtual_if_open(): net_device wl5 ifindex(21) open![ 33.050379] [mtf_txpower_all_rate_info] band_idx:1 pwr:47 ChBand:5G ePAGain:0[ 33.055905] mtk_ppe_dev_register_hook : ineterface wl5 register (5)[ 33.073933] br-lan: port 8(wl5) entered blocking state[ 33.079106] br-lan: port 8(wl5) entered disabled state[ 33.084468] device wl5 entered promiscuous mode[ 33.089121] br-lan: port 8(wl5) entered blocking state[ 33.094282] br-lan: port 8(wl5) entered forwarding state[ 33.111953] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl9[ 33.117875] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 33.126214] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 33.134466] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 5[ 33.140059] [RadarStateCheck] Zero Wait State: 0[ 33.144675] 7986@C23L2wl1,RadarStateCheck() 258: [1;33m RD_SILENCE_MODE [m [ 33.151794] 7986@C23L2wl1,RadarStateCheck() 269: [1;33m mode=2, pDot11h->RDCount=4 [m [ 33.159871] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(3), prim_ch(36), cen_ch_1(50), cen_ch_2(0)![ 33.171356] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 33.179349] wdev_attr_update(): wdevId5 = 26:cf:24:d3:ba:e5[ 33.184928] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band1 group_idx[5]=26, bw_grp=16 omac=18[ 33.195355] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=1 RadioOn[ 33.202411] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->[ 33.209277] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 33.215011] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 33.220667] 7986@C00L1wl1,ApAutoChannelAtBootUp() 418: zero-wait DFS is not enabled[ 33.228307] 7986@C08L1wl1,ap_run_at_boot() 537: [41m ACS is disable !![m[ 33.235386] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:5, CfgMode:0[ 33.246172] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=5, MFPC=0, MFPR=0, SHA256=0[ 33.253987] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 33.261535] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(5)[ 33.270131] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 5[ 33.276463] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 33.304505] PrintSrCmd:[ 33.304505] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.304505] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.318480] PrintSrCmd:[ 33.318480] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.318480] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 33.332470] PrintSrCmd:[ 33.332470] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.332470] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.346448] PrintSrCmd:[ 33.346448] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.346448] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.360610] mbss_virtual_if_open(): net_device wl9 ifindex(22) open![ 33.361377] [mtf_txpower_all_rate_info] band_idx:1 pwr:47 ChBand:5G ePAGain:0[ 33.366984] mtk_ppe_dev_register_hook : ineterface wl9 register (6)[ 33.383277] br-lan: port 9(wl9) entered blocking state[ 33.388440] br-lan: port 9(wl9) entered disabled state[ 33.393755] device wl9 entered promiscuous mode[ 33.398335] br-lan: port 9(wl9) entered blocking state[ 33.403463] br-lan: port 9(wl9) entered forwarding state[ 33.419860] 7986@C08L2wl1,mbss_virtual_if_open() 134: ===> wl15[ 33.425864] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 33.434207] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 33.442463] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 6[ 33.448051] [RadarStateCheck] Zero Wait State: 0[ 33.452667] 7986@C23L2wl1,RadarStateCheck() 258: [1;33m RD_SILENCE_MODE [m [ 33.459785] 7986@C23L2wl1,RadarStateCheck() 269: [1;33m mode=2, pDot11h->RDCount=5 [m [ 33.467864] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(3), prim_ch(36), cen_ch_1(50), cen_ch_2(0)![ 33.479346] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 33.487340] wdev_attr_update(): wdevId6 = 26:cf:24:e3:ba:e5[ 33.492924] WiFi@C12L1,wifi_sys_open() 869: wifi_sys_open():band1 group_idx[6]=27, bw_grp=16 omac=19[ 33.503245] 7986@C02L2wl1,AsicRadioOnOffCtrl() 2279: DbdcIdx=1 RadioOn[ 33.510302] 7986@C00L2wl1,ApAutoChannelAtBootUp() 289: ----------------->[ 33.517167] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 33.522902] 7986@C03L1wl1,MtCmdSetMacTxRx() 10214: (ret = 0)[ 33.528548] 7986@C00L1wl1,ApAutoChannelAtBootUp() 418: zero-wait DFS is not enabled[ 33.536186] 7986@C08L1wl1,ap_run_at_boot() 537: [41m ACS is disable !![m[ 33.543295] 7986@C08L2wl1,APStartUpForMbss() 887: ===>(caller:ap_inf_open+0x140/0x4f8 [mt_wifi]), mbss_idx:6, CfgMode:0[ 33.554087] 7986@C15L2wl1,APPMFInit() 133: [PMF] apidx=6, MFPC=0, MFPR=0, SHA256=0[ 33.561867] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 33.569414] WiFi@C08L2,ap_link_up() 6926: (caller:wdev_do_linkup+0x20/0x38 [mt_wifi]), wdev(6)[ 33.578011] 7986@C01L2wl1,wifi_sys_linkup() 1128: wdev idx = 6[ 33.631773] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 33.659752] PrintSrCmd:[ 33.659752] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.659752] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.673727] PrintSrCmd:[ 33.673727] u1CmdSubId = 5, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.673727] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 33.687698] PrintSrCmd:[ 33.687698] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.687698] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.701664] PrintSrCmd:[ 33.701664] u1CmdSubId = 23, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 33.701664] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 1[ 33.715837] mbss_virtual_if_open(): net_device wl15 ifindex(23) open![ 33.716580] [mtf_txpower_all_rate_info] band_idx:1 pwr:47 ChBand:5G ePAGain:0[ 33.722273] mtk_ppe_dev_register_hook : ineterface wl15 register (7)/etc/init.d/network: Command failed: Not found[ 33.749192] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1581: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_INIT[ 33.757559] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1558: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_UP[ 33.765832] WiFi@C01L2,wifi_sys_open() 827: wdev idx = 8[ 33.771432] [RadarStateCheck] Zero Wait State: 0[ 33.776045] 7986@C23L2wl1,RadarStateCheck() 258: [1;33m RD_SILENCE_MODE [m [ 33.783162] 7986@C23L2wl1,RadarStateCheck() 269: [1;33m mode=2, pDot11h->RDCount=5 [m [ 33.791240] 7986@C23L1wl1,operate_loader_phy() 401: oper_radio after decision: bw(3), prim_ch(36), cen_ch_1(50), cen_ch_2(0)![ 33.802734] WiFi@C00L2,dump_ht_cap() 29: Caller: wlan_operate_init+0xac/0x110 [mt_wifi][ 33.810732] wdev_attr_update(): wdevId8 = 2a:cf:24:c3:ba:e6[ 33.817730] WiFi@C00L2,dump_ht_cap() 29: Caller: dump_ht_cap+0x10/0x20 [mt_wifi][ 33.825146] mtk_ppe_dev_register_hook : ineterface apclix0 register (8)[ 33.834750] br-lan: port 10(apclix0) entered blocking state[ 33.840450] br-lan: port 10(apclix0) entered disabled state[ 33.846194] device apclix0 entered promiscuous mode[ 33.868122] 7986@C08L2wl1,mbss_virtual_if_close() 190: ===> wl14[ 33.874224] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1569: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN[ 33.882897] WiFi@C08L2,ap_link_down() 6944: (caller:wdev_do_linkdown+0x20/0x38 [mt_wifi]), wdev(1)[ 33.892176] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(1) bss not ready (state:2, caller:ap_link_down+0x84/0x130 [mt_wifi])!![ 33.903816] 7986@C01L2wl1,wifi_sys_linkdown() 1252: wdev idx = 1[ 33.910722] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=9, ucCentChSeg0=11, ucCentChSeg1=0, BW=1, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 33.926026] WiFi@C01L2,wifi_sys_close() 907: wdev idx = 1[ 33.931790] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1592: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DEINIT[ 33.940304] mbss_virtual_if_close(): net_device wl14 ifindex(18) close![ 33.946913] extif_put_dev(wl14)[ 33.950043] mtk_ppe_dev_unregister_hook : ineterface wl14 set null (3)[ 33.971406] 7986@C08L2wl1,mbss_virtual_if_close() 190: ===> wl13[ 33.977502] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1569: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN[ 33.986175] WiFi@C08L2,ap_link_down() 6944: (caller:wdev_do_linkdown+0x20/0x38 [mt_wifi]), wdev(2)[ 33.995465] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(2) bss not ready (state:2, caller:ap_link_down+0x84/0x130 [mt_wifi])!![ 34.007169] 7986@C01L2wl1,wifi_sys_linkdown() 1252: wdev idx = 2[ 34.014073] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=9, ucCentChSeg0=11, ucCentChSeg1=0, BW=1, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 34.029341] WiFi@C01L2,wifi_sys_close() 907: wdev idx = 2[ 34.035081] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1592: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DEINIT[ 34.043590] mbss_virtual_if_close(): net_device wl13 ifindex(19) close![ 34.050191] extif_put_dev(wl13)[ 34.053320] mtk_ppe_dev_unregister_hook : ineterface wl13 set null (2)[ 34.059971] br-miot: port 1(wl13) entered disabled state[ 34.090257] 7986@C08L2wl1,mbss_virtual_if_close() 190: ===> wl9[ 34.096276] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1569: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN[ 34.104949] WiFi@C08L2,ap_link_down() 6944: (caller:wdev_do_linkdown+0x20/0x38 [mt_wifi]), wdev(5)[ 34.114229] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(5) bss not ready (state:2, caller:ap_link_down+0x84/0x130 [mt_wifi])!![ 34.125865] 7986@C01L2wl1,wifi_sys_linkdown() 1252: wdev idx = 5[ 34.132771] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 34.148131] WiFi@C01L2,wifi_sys_close() 907: wdev idx = 5[ 34.153875] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1592: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DEINIT[ 34.162386] mbss_virtual_if_close(): net_device wl9 ifindex(22) close![ 34.168902] extif_put_dev(wl9)[ 34.171945] mtk_ppe_dev_unregister_hook : ineterface wl9 set null (6)[ 34.180619] br-lan: port 9(wl9) entered disabled state[ 34.188335] device wl9 left promiscuous mode[ 34.192794] br-lan: port 9(wl9) entered disabled state[ 34.246330] ip_acc_set_table(602): set succ(lan)![ 34.279171] br-lan: port 1(eth0.1) entered disabled state[ 34.287967] 7986@C08L2wl1,mbss_virtual_if_close() 190: ===> wl15[ 34.294078] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1569: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN[ 34.302807] WiFi@C08L2,ap_link_down() 6944: (caller:wdev_do_linkdown+0x20/0x38 [mt_wifi]), wdev(6)[ 34.312083] 7986@C08L1wl1,UpdateBeaconHandler() 1979: wdev(6) bss not ready (state:2, caller:ap_link_down+0x84/0x130 [mt_wifi])!![ 34.323727] 7986@C01L2wl1,wifi_sys_linkdown() 1252: wdev idx = 6[ 34.330634] 7986@C03L1wl1,bssUpdateChannel() 3734: ucPrimCh=36, ucCentChSeg0=50, ucCentChSeg1=0, BW=3, ucHetbRU26Disable=0, ucHetbAllDisable=1[ 34.346082] WiFi@C01L2,wifi_sys_close() 907: wdev idx = 6[ 34.351906] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1592: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DEINIT[ 34.360427] mbss_virtual_if_close(): net_device wl15 ifindex(23) close![ 34.363969] 7986@C09L2wl1,cntl_connect_request() 389: type=2,len=0,caller:ApCliIfUp+0x198/0x328 [mt_wifi][ 34.367050] extif_put_dev(wl15)[ 34.376606] PrintSrCmd:[ 34.376606] u1CmdSubId = 3, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 34.376606] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 34.379705] mtk_ppe_dev_unregister_hook : ineterface wl15 set null (7)[ 34.400243] PrintSrCmd:[ 34.400243] u1CmdSubId = 1, u1ArgNum = 0, u1DbdcIdx = 1, u1Status = 0[ 34.400243] u1DropTaIdx = 0, u1StaIdx = 0, u4Value = 0[ 34.414368] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1569: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DOWN[ 34.423056] WiFi@C01L2,wifi_sys_close() 907: wdev idx = 8[ 34.429004] 7986@C01L2wl1,RTMP_COM_IoctlHandle() 1592: -> CMD_RTPRIV_IOCTL_VIRTUAL_INF_DEINIT[ 34.437565] extif_put_dev(apclix0)[ 34.440960] mtk_ppe_dev_unregister_hook : ineterface apclix0 set null (8)[ 34.447887] br-lan: port 10(apclix0) entered disabled state[ 34.453931] br-lan: port 2(eth0.2) entered disabled state[ 34.459506] device apclix0 left promiscuous mode[ 34.464160] br-lan: port 10(apclix0) entered disabled state[ 34.491241] br-lan: port 3(eth0.3) entered disabled state[ 34.500663] br-lan: port 4(eth0.4) entered disabled statestarting miwifi-roam success/etc/init.d/network: Command failed: Not found[ 34.582335] SetThermalProtectDisable(): band_idx: 0, protection_type: 1, trigger_type: 1[ 34.591632] SetThermalProtectDisable(): band_idx: 1, protection_type: 1, trigger_type: 1[ 34.600889] SetThermalProtectDutyCfg(): band_idx: 0, level_idx: 0, duty: 100[ 34.608983] SetThermalProtectDutyCfg(): band_idx: 0, level_idx: 1, duty: 70[ 34.617029] SetThermalProtectDutyCfg(): band_idx: 0, level_idx: 2, duty: 50[ 34.624985] SetThermalProtectDutyCfg(): band_idx: 0, level_idx: 3, duty: 10[ 34.632982] SetThermalProtectEnable(): band_idx: 0, protection_type: 1, trigger_type: 1[ 34.640992] SetThermalProtectEnable(): trigger_temp: 106, restore_temp: 101, recheck_time: 5[ 34.650430] SetThermalProtectDutyCfg(): band_idx: 1, level_idx: 0, duty: 100[ 34.658501] SetThermalProtectDutyCfg(): band_idx: 1, level_idx: 1, duty: 70[ 34.666397] SetThermalProtectDutyCfg(): band_idx: 1, level_idx: 2, duty: 50[ 34.674366] SetThermalProtectDutyCfg(): band_idx: 1, level_idx: 3, duty: 10[ 34.682291] SetThermalProtectEnable(): band_idx: 1, protection_type: 1, trigger_type: 1[ 34.690296] SetThermalProtectEnable(): trigger_temp: 106, restore_temp: 101, recheck_time: 5[ 34.903383] BcnCheck start after 800 ms (wl1)[ 36.419381] 7986@C13L1wl0,MlmeEnqueueWithWdev() 5579: wdev(8) state: if down![port_service] build network finish[port_service] all services have started/etc/rc.d/S98miqos: miqos: delay 5s to wait for network ready.[ 37.016527] hnat_priv ppd = eth0.6/etc/rc.d/S99boot_check: : INFO: rcS timing 35.516058305s seconds.Tue Aug 30 23:31:50 CST 2022 boot_check[5143]: Booting up finished./etc/rc.d/S99cab_meshd: exist, exit.update cap mesh param doneBusyBox v1.25.1 (2022-08-12 09:08:13 UTC) built-in shell (ash) ----------------------------------------------------- Welcome to XiaoQiang! ----------------------------------------------------- $$$$$$\ $$$$$$$\ $$$$$$$$\ $$\ $$\ $$$$$$\ $$\ $$\ $$ __$$\ $$ __$$\ $$ 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F0: 102B 0000FA: 1040 0000FA: 1040 0000 [0200]F9: 0000 0000V0: 0000 0000 [0001]00: 0000 0000BP: 2400 0041 [0000]G0: 1190 0000EC: 0000 0000 [1000]T0: 0000 022F [010F]Jump to BLNOTICE: BL2: v2.6(release):82a3fbe10a-dirtyNOTICE: BL2: Built : 16:56:29, Mar 29 2022INFO: BL2: Doing platform setupNOTICE: WDT: disabledNOTICE: CPU: MT7986 (2000MHz)NOTICE: EMI: Using DDR4 settingsbefore ctrl3 = 0x218000clear request & ackafter ctrl3 = 0x208000DVFSRC_SUCCESS 0dump drm registers data:1001d000 | 00000000 00000000 00000000 000000001001d010 | 00000000 00000000 00000000 000000001001d020 | 00000000 00000000 00000000 000000001001d030 | 00a083f1 000000ff 00100000 000000001001d040 | 00027e71 000200a0 00020303 000000ff1001d050 | 00000000 00000000 00000000 000000001001d060 | 00000002 00000000 00000000 00000000drm: 500 = 0xctoprgu: 80 = 0x0[DDR Reserve] ddr reserve mode not be enabled yetSave DRM_DEBUG_CTL(0xa083f1)DRM_LATCH_CTL : 0x27e71DRM_LATCH_CTL2: 0x200a0drm_update_reg: 1, bits: 0x8000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x80000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x200, addr: 0x1001d034, val: 0xffdrm_update_reg: 0, bits: 0x200000, addr: 0x1001d034, val: 0xffdrm_update_reg: 0, bits: 0x100, addr: 0x1001d034, val: 0xffMTK_DRM_DEBUG_CTL : 0xa083f1MTK_DRM_DEBUG_CTL2: 0xffdrm_update_reg: 0, bits: 0x4000, addr: 0x1001d030, val: 0xa083f1DRM DDR reserve mode FAIL! a083f1DDR RESERVE Success 0drm_update_reg: 0, bits: 0x2000, addr: 0x1001d030, val: 0xa083f1drm_update_reg: 0, bits: 0x1000, addr: 0x1001d030, val: 0xa083f1[DRAM] into mt_set_emi[EMI] ComboMCP not ready, using default setting Init_DRAM:2139: init PCDDR4 dram Start[MD32_INIT] in c code >>>>>>[MD32_INIT] 3[MD32_INIT] 4[MD32_INIT] 5[MD32_INIT] 6[MD32_INIT] V22 add 1[MD32_INIT] V22 add 1 end[MD32_INIT] 7[MD32_INIT] 8[MD32_INIT] 9[MD32_INIT] 10[MD32_INIT] 11[MD32_INIT] 12[MD32_INIT] 13[MD32_INIT] 14[MD32_INIT] 15[MD32_INIT] 16[MD32_INIT] 17[MD32_INIT] 18[MD32_INIT] 19[MD32_INIT] 20[MD32_INIT] 21[MD32_INIT] 22[MD32_INIT] 23[MD32_INIT] 28[MD32_INIT] 29[MD32_INIT] 30 for RTMRW, if have[MD32_INIT] in c code <<<<<< [Set_DRAM_Pinmux_Sel] DRAMPinmux = 0[Bian_co] ETT version 0.0.0.1 dram_type 4, R0 cbt_mode 0, R1 cbt_mode 0 VENDOR=136Read voltage for 1600, 0Vio18 = 0Vcore = 0Vdram = 0Vddq = 0Vmddr = 0== DRAMC_CTX_T ==support_channel_num: 1channel: 0support_rank_num: 1rank: 0freq_sel: 22shu_type: 0dram_type: 4dram_fsp: 0odt_onoff: 1DBI_R_onoff: 0, 0DBI_W_onoff: 0, 0data_width: 16test2_1: 0x55000000test2_2: 0xaa000100frequency: 1600freqGroup: 1600u1PLLMode: 0dram type 6===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================OCD DRVP=0 ,CALOUT=0OCD DRVP=1 ,CALOUT=0OCD DRVP=2 ,CALOUT=0OCD DRVP=3 ,CALOUT=0OCD DRVP=4 ,CALOUT=0OCD DRVP=5 ,CALOUT=0OCD DRVP=6 ,CALOUT=0OCD DRVP=7 ,CALOUT=0OCD DRVP=8 ,CALOUT=0OCD DRVP=9 ,CALOUT=1OCD DRVP calibration OK! DRVP=9OCD DRVN=0 ,CALOUT=1OCD DRVN=1 ,CALOUT=1OCD DRVN=2 ,CALOUT=1OCD DRVN=3 ,CALOUT=1OCD DRVN=4 ,CALOUT=1OCD DRVN=5 ,CALOUT=1OCD DRVN=6 ,CALOUT=0OCD DRVN calibration OK! DRVN=6[SwImpedanceCal] DRVP=9, DRVN=6freq_region=0, Reg: DRVP=11, DRVN=8, ODTP=6MEM_TYPE=6, freq_sel=22[ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:===================================PCDDR4 DRAM CONFIGURATION===================================CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8======================================================================ANA top config===================================ASYNC_MODE = 3DLL_ASYNC_EN = 1ALL_SLAVE_EN = 0NEW_RANK_MODE = 0DLL_IDLE_MODE = 1LP45_APHY_COMB_EN = 1TX_ODT_DIS = 0NEW_8X_MODE = 0======================================================================data_rate = 3200CKR = 1DQ_P2S_RATIO = 8===================================CA_P2S_RATIO = 8DQ_CA_OPEN = 0DQ_SEMI_OPEN = 0CA_SEMI_OPEN = 0CA_FULL_RATE = 0DQ_CKDIV4_EN = 0CA_CKDIV4_EN = 0CA_PREDIV_EN = 0PH8_DLY = 31SEMI_OPEN_CA_PICK_MCK_RATIO= 0DQ_AAMCK_DIV = 4CA_AAMCK_DIV = 4CA_ADMCK_DIV = 4DQ_TRACK_CA_EN = 0CA_PICK = 1600CA_MCKIO = 1600MCKIO_SEMI = 0PLL_FREQ = 3200DQ_UI_PI_RATIO = 32CA_UI_PI_RATIO = 0======================================================================memory_type:PCDDR4GP_NUM : 1SRAM_EN : 1MD32_EN : 0==============================================================================HW_ZQCAL_config===========================================ZQCALL is 0TZQLAT is 27ZQCSDUAL is 0ZQCSCNT is 511===========================================[ANA_INIT] >>>>>>>>>>>>>>[ANA_ClockOff_Sequence] flow startWLY_DEBUG::ANA_ClockOff_Sequence delay 100ns startWLY_DEBUG::ANA_ClockOff_Sequence delay 100ns end[ANA_ClockOff_Sequence] flow end============ PULL DRAM RESETB DOWN ====================== PULL DRAM RESETB DOWN end ===================== SUSPEND_ON ======================== SUSPEND_ON end ======================== SPM_control ======================== SPM_control end ============<<<<<< [CONFIGURE PHASE]: ANA_TX>>>>>> [CONFIGURE PHASE][SHUFFLE]: PLL===================================data_rate = 3200,PCW = 0X7800===================================<<<<<< [CONFIGURE PHASE][SHUFFLE]: PLLINFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0INFO: RG_ARCMD_REV_TEMP_VALUE= 0x0INFO: RG_ARCMD_REV_TEMP_VALUE= 0x60>>>>>> [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configurationINFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B0_TEMP_VALUE= 0x0 PH8_DLY= 0x1fINFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B1_TEMP_VALUE= 0x0 PH8_DLY= 0x1fINFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0INFO: RG_ARDQ_REV_B2_TEMP_VALUE= 0x0 PH8_DLY= 0x1fINFO: RG_ARCMD_REV_TEMP_VALUE= 0x60INFO: RG_ARCMD_REV_TEMP_VALUE= 0x60 PH8_DLY= 0x1f<<<<<< [CONFIGURE PHASE][SHUFFLE]: ANA CLOCK DIV configuration>>>>>> [CONFIGURE PHASE][SHUFFLE]: DLLINFO: RG_ARCMD_REV_TEMP_VALUE= 0x60INFO: RG_ARCMD_REV_TEMP_VALUE= 0x61<<<<<< [CONFIGURE PHASE][SHUFFLE]: DLL[ANA_INIT] flow start[ANA_INIT] PLL >>>>>>>>[ANA_INIT] PLL <<<<<<<<[ANA_INIT] MIDPI >>>>>>>>[ANA_INIT] MIDPI <<<<<<<<[ANA_INIT] DLL >>>>>>>>[ANA_INIT] DLL <<<<<<<<[ANA_INIT] flow end[ANA_INIT] <<<<<<<<<<<<<[Flow] [DDRPHY] DIG_CONFIG_NONSHUF_DCM <<<<<[Flow] [DDRPHY] DIG_CONFIG_NONSHUF_DCM <<<<<[Flow] Enable top DCM control >>>>>[Flow] Enable top DCM control <<<<<Enable DLL master slave shuffle==============================================================Gating Mode config==============================================================Config description:RX_GATING_MODE 0: Pulse Mode 1: Burst Mode(8UI) 2: Burst Mode(7UI) 3: Original Burst ModeRX_GATING_TRACK_MODE 0: Valid DLY Mode 1: Valid Mode (Jade-like) 2: FIFO modeSELPH_MODE 0: By rank 1: By Phase==============================================================GAT_TRACK_EN = 1RX_GATING_MODE = 2RX_GATING_TRACK_MODE = 2SELPH_MODE = 1PICG_EARLY_EN = 1VALID_LAT_VALUE = 0==============================================================Enter into Gating configuration >>>>Exit from Gating configuration <<<<[DIG_HW_NONSHUF_ZQCAL_CFG],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG_FOR_PCDDR],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG],Configuration Enter[DIG_HW_NONSHUF_ZQCAL_CFG_FOR_PCDDR],Configuration EnterEnter into PICG configuration >>>>Exit from PICG configuration <<<<[DIG_SHUF_CONFIG] DCM_FUNCTION >>>>>>, group_id=0[DIG_SHUF_CONFIG] DCM_FUNCTION <<<<<<, group_id=0[DIG_FREQ_CONFIG][TX_CA][Delay] ch_id:0, group_id:0 >>>>>[DIG_FREQ_CONFIG][TX_CA][Delay] ch_id:0, group_id:0 <<<<<[DIG_HW_SHUF_ZQCAL_CFG] Group:0, Configuration Enter[ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:===================================PCDDR4 DRAM CONFIGURATION===================================CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8===================================[ReadLatency GET] MR_CL:[ReadLatency GET] MR_CL:UI_MCK_least is 1RX_GW_selph_by_ps[0] is 12464RX_GW_selph_by_ps[1] is 12464RX_GW_selph_by_ps[2] is 12464RX_GW_selph_by_ps[3] is 12464===================================RX_path CONFIGURATION===================================data_rate is 3200dq_p2s_ratio is 8ca_default_delay is 1ca_ser_latency is 7cs2RL_start is 1byte_num is 2rank_num is 2RL[0] is 24RL[1] is 24RL_min is 24RL_max is 24TDQSCK[0] is 0TDQSCK[1] is 0TDQSCK[2] is 0TDQSCK[3] is 0dqsien_default_delay is 0dqsien_ser_latency is 7oe_ser_latency is 4gating_window_ahead_dqs is 2aphy_slice_delay is 11aphy_dtc_delay is 100aphy_lead_lag_margin is 16dram_ui_ratio is 2dq_ui_unit is 312ca_ui_unit is 312MCK_unit is 2496dramc_dram_ratio is 4CKR is 1tRPRE_toggle is 0tRPRE_static is 2tRPST is 0DQSIENMODE is 1BL is 16FAKE_1TO16_MODE is 0SVA_1_10_t2_SPEC is 11read_cmd_out is 1ca_MCKIO_ui_unit is 312ca_p2s_ratio is 8TDQSCK_min_SPEC is 0TDQSCK_max_SPEC is 360TX_pipeline is 1RX_pipeline is 1NEW_RANK_MODE is 0close_loop_mode is 1======================================================================RX_path RG value===================================RX_UI_P0[0] is 15RX_UI_P0[1] is 15RX_UI_P0[2] is 15RX_UI_P0[3] is 15RX_UI_P1[0] is 19RX_UI_P1[1] is 19RX_UI_P1[2] is 19RX_UI_P1[3] is 19RX_PI[0] is 31RX_PI[1] is 31RX_PI[2] is 31RX_PI[3] is 31DQSINCTL is 3DATLAT_DSEL is 11DATLAT is 12DATLAT_DSEL_PHY is 12DLE_EXTEND is 1RX_IN_GATE_EN_HEAD is 0RX_IN_GATE_EN_TAIL is 0RX_IN_BUFF_EN_HEAD is 2RX_IN_BUFF_EN_TAIL is 0RX_IN_GATE_EN_PRE_OFFSET is 2RANKINCTL_ROOT1 is 1RANKINCTL is 1RANKINCTL_STB is 2RANKINCTL_RXDLY is 0SHU_GW_THRD_POS is 42SHU_GW_THRD_NEG is 0RDSEL_TRACK_EN is 0RDSEL_HWSAVE_MSK is 1DMDATLAT_i is 12RODTEN is 0RODT is 0RODTE is 1RODTE2 is 1ODTEN_MCK_P0[4] is 0ODTEN_MCK_P1[4] is 0ODTEN_UI_P0[4] is 0ODTEN_UI_P1[4] is 0RX_RANK_DQS_LAT is 0RX_RANK_DQ_LAT is 1RANKINCTL_PHY is 5RANK_SEL_LAT_CA is 0RANK_SEL_LAT_B0 is 0RANK_SEL_LAT_B1 is 0RANK_SEL_STB_EN is 0RANK_SEL_RXDLY_TRACK is 0RANK_SEL_STB_TRACK is 1RANK_SEL_STB_PHASE_EN is 1RANK_SEL_PHSINCTL is 2RANK_SEL_STB_UI_MINUS is 2RANK_SEL_STB_UI_PLUS is 0RANK_SEL_MCK_P0 is 0RANK_SEL_UI_P0 is 0RANK_SEL_MCK_P1 is 1RANK_SEL_UI_P1 is 0R0DQSIENLLMTEN is 1R0DQSIENLLMT is 96R0DQSIENHLMTEN is 1R0DQSIENHLMT is 63R1DQSIENLLMTEN is 1R1DQSIENLLMT is 96R1DQSIENHLMTEN is 1R1DQSIENHLMT is 63DQSIEN_FIFO_DEPTH_HALF is 1===================================[ModeRegister CWL Config] data_rate:3200-MR_CWL:[ModeRegister CL Config] data_rate:3200-MR_CL:[ModeRegister WR Config] data_rate:3200-MR_WR:===================================PCDDR4 DRAM CONFIGURATION===================================CWL = 0x7RTT_NORM = 0x6CL = 0xbAL = 0x0BL = 0x0RBT = 0x0WR = 0x8===================================[WriteLatency GET] MR_CWL:[WriteLatency GET] MR_CWL:=====================================print TX_path_config=====================================data_ratio is 3200dq_p2s_ratio is 8cs2WL_start is 1byte_num is 2rank_num is 2CKR is 1DBI_WR is 0dly_1T_by_FDIV2 is 0WL[0] is 20WL[1] is 20TDQSS[0][0] is 156TDQSS[0][1] is 156TDQSS[1][0] is 156TDQSS[1][1] is 156TDQS2DQ[0][0] is 0TDQS2DQ[0][1] is 0TDQS2DQ[1][0] is 0TDQS2DQ[1][1] is 0ca_p2s_ratio is 8ca_default_dly is 1ca_default_pi is 0ca_ser_latency is 7dqs_ser_laterncy is 7dqs_default_dly is 5dqs_oe_default_dly is 2dq_ser_laterncy is 7MCK_unit is 2496dq_ui_unit is 312ca_unit is 312ca_MCKIO_unit is 312ca_frate is 0TX_ECC is 0TWPRE is 4OE_pre_margin is 400OE_pst_margin is 500OE_downgrade is 1aphy_slice_dly is 11aphy_dtc_dly is 100aphy_tx_dly is 16DDRPHY_CLK_EN_COMB_TX_OPT is 1NEW_RANK_MODE is 0close_loop_mode is 1TXP_WORKAROUND_OPT is 0ui2pi_ratio is 32XRTW2W_PI_mute_time is 7fake_mode is 0===========================================TX_DQ_UI_OE_pre is 2TX_DQS_UI_OE_pre is 1data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3data_ratio 3200, TX_dq_latency_ps is 8112, TX_dq_latency_MCK is 3===========================================print TX_path_attribution===========================================TX_DQ_MCK_OE[0][0] is 2TX_DQ_MCK_OE[0][1] is 2TX_DQ_MCK_OE[1][0] is 2TX_DQ_MCK_OE[1][1] is 2TX_DQ_UI_OE[0][0] is 6TX_DQ_UI_OE[0][1] is 6TX_DQ_UI_OE[1][0] is 6TX_DQ_UI_OE[1][1] is 6TX_DQ_MCK[0][0] is 3TX_DQ_MCK[0][1] is 3TX_DQ_MCK[1][0] is 3TX_DQ_MCK[1][1] is 3TX_DQ_UI[0][0] is 2TX_DQ_UI[0][1] is 2TX_DQ_UI[1][0] is 2TX_DQ_UI[1][1] is 2TX_DQ_PI[0][0] is 0TX_DQ_PI[0][1] is 0TX_DQ_PI[1][0] is 0TX_DQ_PI[1][1] is 0TX_DQ_UIPI_all[0][0] is 0TX_DQ_UIPI_all[0][1] is 0TX_DQ_UIPI_all[1][0] is 0TX_DQ_UIPI_all[1][1] is 0TX_DQ_dlyline[0][0] is 0TX_DQ_dlyline[0][1] is 0TX_DQ_dlyline[1][0] is 0TX_DQ_dlyline[1][1] is 0TX_DQS_MCK_OE[0][0] is 2TX_DQS_MCK_OE[0][1] is 2TX_DQS_MCK_OE[1][0] is 2TX_DQS_MCK_OE[1][1] is 2TX_DQS_UI_OE[0][0] is 6TX_DQS_UI_OE[0][1] is 6TX_DQS_UI_OE[1][0] is 6TX_DQS_UI_OE[1][1] is 6TX_DQS_MCK[0][0] is 3TX_DQS_MCK[0][1] is 3TX_DQS_MCK[1][0] is 3TX_DQS_MCK[1][1] is 3TX_DQS_UI[0][0] is 1TX_DQS_UI[0][1] is 1TX_DQS_UI[1][0] is 1TX_DQS_UI[1][1] is 1DDRPHY_CLK_EN_COMB_TX_OPT is 1TX_DQS_PI[0][0] is 16TX_DQS_PI[0][1] is 16TX_DQS_PI[1][0] is 16TX_DQS_PI[1][1] is 16DDRPHY_CLK_EN_COMB_TX_PICG_CNT is 2DDRPHY_CLK_EN_COMB_TX_DQS_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQS_SEL_P1 is 4DDRPHY_CLK_EN_COMB_TX_DQ_RK0_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQ_RK0_SEL_P1 is 4DDRPHY_CLK_EN_COMB_TX_DQ_RK1_SEL_P0 is 3DDRPHY_CLK_EN_COMB_TX_DQ_RK1_SEL_P1 is 4DPHY_TX_DCM_EXTCNT is 0TX_PI_UPD_MODE is 1TX_PI_UPDCTL_B0 is 0TX_PI_UPDCTL_B1 is 0TX_RANKINCTL_ROOT is 0TX_RANKINCTL is 1TX_RANKINCTL_TXDLY is 2DDRPHY_CLK_DYN_GATING_SEL is 5DDRPHY_CLK_EN_OPT is 1ARPI_CMD is 0TDMY is 9TXOEN_AUTOSET_DQ_OFFSET is 3TXOEN_AUTOSET_DQS_OFFSET is 3TXOEN_AUTOSET_EN is 1TXPICG_AUTOSET_OPT is 0TXPICG_AUTOSET_EN is 1TXPICG_DQ_MCK_OFFSET_LAG is 0TXPICG_DQS_MCK_OFFSET_LAG is 0TXPICG_DQ_UI_OFFSET_LEAD is 0TXPICG_DQ_UI_OFFSET_LAG is 1TXPICG_DQS_UI_OFFSET_LEAD is 1TXPICG_DQS_UI_OFFSET_LAG is 0===========================================set APHY_PI_CKCGH_CNT is 4 when not fake_mode, cur data_rate is 3200[DIG_SHUF_CONFIG] MISC >>>>>, group_id=0[DIG_SHUF_CONFIG] MISC <<<<<<, group_id=0[DIG_SHUF_CONFIG] DBI >>>>>>, group_id=0[DIG_SHUF_CONFIG] DBI <<<<<<, group_id=0dramc_dram_ratio: 4DDR4_DivMode: 1freq_index: 1600match AC timing 1[DDR4_ac_timing_setting]start[PC4 WR preamble settings]>>>>>>>> group_id = 0.[PC4 WR preamble settings]<<<<<<<< group_id = 0.clk_dramc_ref_sel FREQ=16fmem_ck_bfe_dcm_ch0 FREQ=253fmem_ck_aft_dcm_ch0 FREQ=253SetClkFreeRun enter => DRAM clock free run mode = ON.[DDR4] Pull Down reset.[DDR4] cke fix low 10ns at least.[DDR4] Delay 200 us.[DDR4] Pull Up reset.[DDR4] Delay 500 us.[DDR4] DRAM initilization RK:0 Enter >>>>>>>>[DDR4] Delay TXPR TRFC+10ns - 350ns(8Gb density)+10ns[DDR4_MRS] RK:0-MA:2-OP:0x[DDR4_MRS] RK:0-MA:3-OP:0x[DDR4_MRS] RK:0-MA:1-OP:0x[DDR4_MRS] RK:0-MA:4-OP:0x[DDR4_MRS] RK:0-MA:5-OP:0x[DDR4] DQ Vref calibration>>>>>>>[DDR4] DQ Vref Enable DQ vref calibration.[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] wait tVREFDQE-150ns[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] DQ Vref modify range and value[DDR4] DQ Vref Exit DQ vref calibration.[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4] wait tVREFDQx-150ns[DDR4] DQ Vref calibration<<<<<<<[DDR4_MRS] RK:0-MA:0-OP:0x[DDR4_ZQ] RK:0 Enter >>>>>>>>[DDR4_ZQ] RK:0 Exit <<<<<<<<[DDR4] Delay ZQinit - 718ns for 1333 at least max(512Mck,640ns)[DDR4] DRAM initilization RK:0 Exit <<<<<<<[DDR4] Enable refresh.....All bank refresh onlySetClkFreeRun enter => DRAM clock free run mode = OFF.[DIG_HW_NONSHUF_ZQCAL_SWITCH],Configuration Enter[DIG_HW_NONSHUF_DQSG_SWITCH],Configuration EnterSET_CKE_2_RANK_INDEPENDENT_RUN_TIME: ON[MiockJmeterHQA]===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[DramcMiockJmeter] u1RxGatingPI = 00 : 2286, 22861 : 2271, 22712 : 2271, 22713 : 2272, 22724 : 2271, 22715 : 2267, 22676 : 2271, 22717 : 2271, 22718 : 2267, 22679 : 2272, 227210 : 2272, 227211 : 2272, 227212 : 2271, 227113 : 2276, 227614 : 2272, 227215 : 2271, 227116 : 2271, 227117 : 2272, 227218 : 2271, 227119 : 2272, 227220 : 2271, 227121 : 2271, 227122 : 2272, 227223 : 2271, 227124 : 2271, 227125 : 2271, 227126 : 2271, 227127 : 2272, 227228 : 2266, 226629 : 2271, 227130 : 2272, 227231 : 2271, 227132 : 2271, 227133 : 2276, 227634 : 2276, 227635 : 2276, 227636 : 2276, 227637 : 2276, 538 : 2271, 039 : 2276, 040 : 2271, 041 : 2271, 042 : 2272, 043 : 2271, 044 : 2272, 045 : 2272, 046 : 2272, 047 : 2271, 048 : 2272, 049 : 2271, 050 : 2276, 051 : 2271, 052 : 2271, 053 : 2272, 054 : 2272, 055 : 2271, 056 : 2266, 057 : 2272, 058 : 2276, 059 : 2271, 060 : 2272, 061 : 2267, 062 : 2276, 063 : 2272, 064 : 2272, 065 : 2276, 066 : 2272, 067 : 2271, 068 : 2266, 069 : 2276, 070 : 2271, 071 : 2272, 072 : 2271, 073 : 2272, 074 : 2271, 075 : 2272, 076 : 2272, 077 : 2272, 078 : 2276, 079 : 2272, 080 : 2271, 081 : 2277, 082 : 2267, 083 : 2271, 084 : 2271, 085 : 2272, 086 : 2271, 087 : 2266, 10388 : 2272, 196489 : 2271, 227190 : 2272, 227291 : 2272, 227292 : 2271, 227193 : 2272, 227294 : 2271, 227195 : 2272, 227296 : 2272, 227297 : 2271, 227198 : 2272, 227299 : 2271, 2271100 : 2276, 2276101 : 2271, 2271102 : 2271, 2271103 : 2271, 2271104 : 2276, 2276105 : 2271, 2271106 : 2272, 2272107 : 2272, 2272108 : 2271, 2271109 : 2271, 2271110 : 2271, 2271111 : 2272, 2272112 : 2272, 2272113 : 2266, 2266114 : 2266, 2266115 : 2271, 2271116 : 2272, 2272117 : 2276, 2276118 : 2271, 2271119 : 2271, 2271120 : 2271, 2271121 : 2266, 2266122 : 2271, 2271123 : 2271, 2271124 : 2276, 2276125 : 2272, 2272126 : 2272, 2272127 : 2272, 2272 MIOCK jitter meter ch=01T = (88-37)*2 = 102 dly cellsClock freq = 1560 MHz, period = 641 ps, 1 dly cell = 628/100 ps----->DramcWriteLeveling(PI) begin...===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Begin: 0, End: 63, Step: 1, Bound: 64[DDR4_MRS] RK:0-MA:2-OP:0x[DDR4_MRS] RK:0-MA:1-OP:0x[Write Leveling]delay byte0 byte1 byte2 byte3 0 O1( 1 1 1 O1( 1 1 2 O1( 1 1 3 O1( 1 1 4 O1( 1 1 5 O1( 1 1 6 O1( 1 1 7 O1( 1 1 8 O1( 1 1 9 O1( 1 1 10 O1( 1 1 11 O1( 1 0 12 O1( 1 0 13 O1( 1 0 14 O1( 1 0 15 O1( 0 0 16 O1( 0 0 17 O1( 0 0 18 O1( 0 0 19 O1( 0 0 20 O1( 0 0 21 O1( 0 0 22 O1( 0 0 23 O1( 0 0 24 O1( 0 0 25 O1( 0 0 26 O1( 0 0 27 O1( 0 0 28 O1( 0 0 29 O1( 0 0 30 O1( 0 0 31 O1( 0 0 32 O1( 0 0 33 O1( 0 0 34 O1( 0 0 35 O1( 0 0 36 O1( 0 0 37 O1( 0 0 38 O1( 0 0 39 O1( 0 0 40 O1( 0 0 41 O1( 1 1 42 O1( 0 1 43 O1( 1 1 44 O1( 1 1 45 O1( 1 1 46 O1( 1 1 47 O1( 1 1 48 O1( 1 1 49 O1( 1 1 Early breakpass bytecount = 0xff (0xff: all bytes pass)[DDR4_MRS] RK:0-MA:1-OP:0x[DDR4_MRS] RK:0-MA:2-OP:0xWrite leveling (Byte 0): 43 => 43Write leveling (Byte 1): 41 => 41DramcWriteLeveling(PI) end<-----===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[Gating] SW mode calibration[get_gating_start_pos] calculated gating ui = 1512 0 | B1->B0 | 1212 1111 | 1 1 | (0 0) (0 0)12 4 | B1->B0 | 1111 1111 | 1 1 | (0 0) (0 0)12 8 | B1->B0 | 1111 1111 | 1 1 | (0 0) (0 0)12 12 | B1->B0 | 1212 1111 | 1 1 | (0 1) (0 1)12 16 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)12 20 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)12 24 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)12 28 | B1->B0 | 1212 1111 | 1 1 | (1 1) (1 1)13 0 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)13 4 | B1->B0 | 1111 1111 | 1 1 | (1 1) (1 1)13 8 | B1->B0 | 1515 1717 | 1 1 | (1 1) (1 1)13 12 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)13 16 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)13 20 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)13 24 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)13 28 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)14 0 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)14 4 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 0)14 8 | B1->B0 | 2222 2323 | 0 0 | (0 0) (0 1)14 12 | B1->B0 | 2222 2323 | 0 0 | (0 1) (0 1)14 16 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)14 20 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)14 24 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)14 28 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 0 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 4 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 8 | B1->B0 | 2222 2323 | 0 0 | (1 1) (1 1)15 12 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 16 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)15 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)16 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)16 12 | B1->B0 | 2323 2323 | 0 0 | (1 1) (0 1)16 16 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)16 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 8 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 12 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 16 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 20 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 24 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)17 28 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 0 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 4 | B1->B0 | 2323 2323 | 0 0 | (1 1) (1 1)18 8 | B1->B0 | 2323 2323 | 0 0 | (1 0) (1 0)18 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (1 0)18 16 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)18 20 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)18 24 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)18 28 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 0 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 4 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)19 8 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)best dqsien dly found for B0: (18, 10)19 12 | B1->B0 | 2323 2323 | 0 0 | (0 0) (0 0)best dqsien dly found for B1: (18, 8)best DQS0 dly(UI, PI) = (18, 10)best DQS1 dly(UI, PI) = (18, 8)[Gating] SW calibration Done[DDR4_MRS] RK:0-MA:3-OP:0x===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Start DQ dly to find pass range UseTestEngine =0UseTestEngine: 0RX Vref Scan: 0RX Vref 0 -> 0, step: 1RX Delay -48 -> 63, step: 4-48, [0] xxxxxxxx xxxxxxxx [MSB]-44, [0] xxxxxxxx xxxxxxxx [MSB]-40, [0] xxxxxxxx xxxxxxxx [MSB]-36, [0] xxxxxxxx xxxxxxxx [MSB]-32, [0] xxxxxxxx xxxxxxxx [MSB]-28, [0] xxxxxxxx xxxxxxxx [MSB]-24, [0] xxxxxxxx xxxxxxxx [MSB]-20, [0] xxxxxxxx xxxxxxxx [MSB]-16, [0] xxxxxxxx xxxxxxxx [MSB]-12, [0] xxxxxxxx xxxxxxxx [MSB]-8, [0] xxxxxxxx xxxxxxxx [MSB]-4, [0] xxxxxxox xxxxxxxx [MSB]0, [0] xxoxxxox xxxxxxxx [MSB]4, [0] oxoxoxoo oxoxoxox [MSB]8, [0] oooooooo oooooooo [MSB]12, [0] oooooooo oooooooo [MSB]16, [0] oooooooo oooooooo [MSB]20, [0] oooooooo oooooooo [MSB]24, [0] oooooooo oooooooo [MSB]28, [0] oooooooo oooooooo [MSB]32, [0] oooooooo oooooooo [MSB]36, [0] ooooooxo oooooooo [MSB]40, [0] ooxoooxo oooooooo [MSB]44, [0] xoxoxoxx xoxxxoxx [MSB]48, [0] xxxxxxxx xxxxxxxx [MSB]RX Vref B0= 0, Window Sum 320, worse bit 0, min window 40iDelay=48, Bit 0, Center 23 (4 ~ 43) 40iDelay=48, Bit 1, Center 27 (8 ~ 47) 40iDelay=48, Bit 2, Center 19 (0 ~ 39) 40iDelay=48, Bit 3, Center 27 (8 ~ 47) 40iDelay=48, Bit 4, Center 23 (4 ~ 43) 40iDelay=48, Bit 5, Center 27 (8 ~ 47) 40iDelay=48, Bit 6, Center 15 (-4 ~ 35) 40iDelay=48, Bit 7, Center 23 (4 ~ 43) 40RX Vref B1= 0, Window Sum 312, worse bit 11, min window 36iDelay=48, Bit 8, Center 23 (4 ~ 43) 40iDelay=48, Bit 9, Center 27 (8 ~ 47) 40iDelay=48, Bit 10, Center 23 (4 ~ 43) 40iDelay=48, Bit 11, Center 25 (8 ~ 43) 36iDelay=48, Bit 12, Center 23 (4 ~ 43) 40iDelay=48, Bit 13, Center 27 (8 ~ 47) 40iDelay=48, Bit 14, Center 23 (4 ~ 43) 40iDelay=48, Bit 15, Center 25 (8 ~ 43) 36[DDR4_MRS] RK:0-MA:3-OP:0x===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DQS Delay:DQS0 = 0, DQS1 = 0DQM Delay:DQM0 = 23, DQM1 = 24DQ Delay:DQ0 =23, DQ1 =27, DQ2 =19, DQ3 =27DQ4 =23, DQ5 =27, DQ6 =15, DQ7 =23DQ8 =23, DQ9 =27, DQ10 =23, DQ11 =25DQ12 =23, DQ13 =27, DQ14 =23, DQ15 =25===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:2 Autok:0 TX Vref Scan disable809 |3 0 41|[0] xxxxxxxx xxxxxxxx [MSB]811 |3 0 43|[0] xxoxxxox xxxxxxxo [MSB]813 |3 0 45|[0] xxoxxxox xxoxoxxo [MSB]815 |3 0 47|[0] xxoxxxox xxoxooxo [MSB]817 |3 0 49|[0] oooxooox oooooooo [MSB]833 |3 2 1|[0] xoxoooxo xoxxxooo [MSB]835 |3 2 3|[0] xoxoxoxo xoxxxoxo [MSB]837 |3 2 5|[0] xoxxxoxo xoxxxxxx [MSB]839 |3 2 7|[0] xoxxxoxx xxxxxxxx [MSB]841 |3 2 9|[0] xoxxxxxx xxxxxxxx [MSB]843 |3 2 11|[0] xxxxxxxx xxxxxxxx [MSB]TX Bit0 (817~831) 16 824, Bit8 (817~831) 16 824,TX Bit1 (817~841) 26 829, Bit9 (817~837) 22 827,TX Bit2 (811~831) 22 821, Bit10 (813~831) 20 822,TX Bit3 (819~835) 18 827, Bit11 (817~831) 16 824,TX Bit4 (817~833) 18 825, Bit12 (813~831) 20 822,TX Bit5 (817~839) 24 828, Bit13 (815~835) 22 825,TX Bit6 (811~831) 22 821, Bit14 (817~833) 18 825,TX Bit7 (819~837) 20 828, Bit15 (811~835) 26 823, == TX Byte 0 ==Update DQ dly =825 (3 ,0, 57) DQ OEN =(2 ,5)Update DQM dly =825 (3 ,0, 57) DQM OEN =(2 ,5) == TX Byte 1 ==Update DQ dly =824 (3 ,0, 56) DQ OEN =(2 ,5)Update DQM dly =824 (3 ,0, 56) DQM OEN =(2 ,5)===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:0 Autok:0[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 3[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 5[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 7[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 9[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 11[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 13[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 15[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 17TX Vref=3, minBit 8, minWin=14, winSum=277TX Vref=5, minBit 0, minWin=16, winSum=293TX Vref=7, minBit 0, minWin=16, winSum=296TX Vref=9, minBit 0, minWin=16, winSum=301TX Vref=11, minBit 0, minWin=17, winSum=315TX Vref=13, minBit 0, minWin=17, winSum=325TX Vref=15, minBit 0, minWin=17, winSum=328TX Vref=17, minBit 0, minWin=19, winSum=338[TxChooseVref] Worse bit 0, Min win 19, Win sum 338, Final Vref 17[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DDR4_MRS] RK:0-MA:6-OP:0x[DramcTXSetVref] TX Vref : CH0 Rank0, TX Range 1 Vref 17Final TX Range 1 Vref 17===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================[TxWindowPerbitCal] caltype:0 Autok:0 TX Vref Scan disable809 |3 0 41|[0] xxxxxxxx xxxxxxxx [MSB]810 |3 0 42|[0] xxxxxxxx xxxxxxxx [MSB]811 |3 0 43|[0] xxxxxxxx xxxxxxxx [MSB]812 |3 0 44|[0] xxxxxxxx xxoxoxxo [MSB]813 |3 0 45|[0] xxxxxxox xxoxooxo [MSB]814 |3 0 46|[0] xxoxxxox oxoxoxoo [MSB]815 |3 0 47|[0] xxoxxxox oxooooxo [MSB]816 |3 0 48|[0] oxoxoxox oooooooo [MSB]817 |3 0 49|[0] ooooooox oooooooo [MSB]832 |3 2 0|[0] ooooooxo oooooooo [MSB]833 |3 2 1|[0] ooooooxo oooooooo [MSB]834 |3 2 2|[0] ooxoooxo xoxxxooo [MSB]835 |3 2 3|[0] xoxoooxo xoxxxoxo [MSB]836 |3 2 4|[0] xoxoxoxo xoxxxxxo [MSB]837 |3 2 5|[0] xoxxxoxo xoxxxxxx [MSB]838 |3 2 6|[0] xoxxxoxo xxxxxxxx [MSB]839 |3 2 7|[0] xoxxxoxx xxxxxxxx [MSB]840 |3 2 8|[0] xxxxxxxx xxxxxxxx [MSB]TX Bit0 (816~834) 19 825, Bit8 (814~833) 20 823,TX Bit1 (817~839) 23 828, Bit9 (816~837) 22 826,TX Bit2 (814~833) 20 823, Bit10 (812~833) 22 822,TX Bit3 (817~836) 20 826, Bit11 (815~833) 19 824,TX Bit4 (816~835) 20 825, Bit12 (812~833) 22 822,TX Bit5 (817~839) 23 828, Bit13 (815~835) 21 825,TX Bit6 (813~831) 19 822, Bit14 (816~834) 19 825,TX Bit7 (818~838) 21 828, Bit15 (812~836) 25 824,[TX_PER_BIT_DELAY_CELL] DelayCellTimex100 =628/100 ps == TX Byte 0 ==u2DelayCellOfst[0]=4 cells (3 PI)u2DelayCellOfst[1]=9 cells (6 PI)u2DelayCellOfst[2]=1 cells (1 PI)u2DelayCellOfst[3]=6 cells (4 PI)u2DelayCellOfst[4]=4 cells (3 PI)u2DelayCellOfst[5]=9 cells (6 PI)u2DelayCellOfst[6]=0 cells (0 PI)u2DelayCellOfst[7]=9 cells (6 PI)Update DQ dly =822 (3 ,0, 54) DQ OEN =(2 ,5)Update DQM dly =825 (3 ,0, 57) DQM OEN =(2 ,5) == TX Byte 1 ==u2DelayCellOfst[8]=1 cells (1 PI)u2DelayCellOfst[9]=6 cells (4 PI)u2DelayCellOfst[10]=0 cells (0 PI)u2DelayCellOfst[11]=3 cells (2 PI)u2DelayCellOfst[12]=0 cells (0 PI)u2DelayCellOfst[13]=4 cells (3 PI)u2DelayCellOfst[14]=4 cells (3 PI)u2DelayCellOfst[15]=3 cells (2 PI)Update DQ dly =822 (3 ,0, 54) DQ OEN =(2 ,5)Update DQM dly =824 (3 ,0, 56) DQM OEN =(2 ,5)===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DATLAT Default: 0xc0, 0x1, 0x2, 0x3, 0x4, 0x5, 0x6, 0x7, 0x8, 0x9, 0x10, 0x11, 0x12, 0x13, 0xbest_step = 11===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================Start DQ dly to find pass range UseTestEngine =1UseTestEngine: 1RX Vref Scan: 1Set Vref Range= 9 -> 21RX Vref 9 -> 21, step: 1RX Delay -14 -> 63, step: 2Set Vref, RX VrefLevel [Byte0]: 9 [Byte1]: 9RX Vref B0= 9, Window Sum 238, worse bit 3, min window 28RX Vref B1= 9, Window Sum 214, worse bit 10, min window 22Set Vref, RX VrefLevel [Byte0]: 10 [Byte1]: 10RX Vref B0= 10, Window Sum 250, worse bit 1, min window 30RX Vref B1= 10, Window Sum 226, worse bit 10, min window 24Set Vref, RX VrefLevel [Byte0]: 11 [Byte1]: 11RX Vref B0= 11, Window Sum 258, worse bit 3, min window 30RX Vref B1= 11, Window Sum 238, worse bit 10, min window 26Set Vref, RX VrefLevel [Byte0]: 12 [Byte1]: 12RX Vref B0= 12, Window Sum 262, worse bit 1, min window 32RX Vref B1= 12, Window Sum 246, worse bit 10, min window 28Set Vref, RX VrefLevel [Byte0]: 13 [Byte1]: 13RX Vref B0= 13, Window Sum 276, worse bit 0, min window 34RX Vref B1= 13, Window Sum 258, worse bit 10, min window 30Set Vref, RX VrefLevel [Byte0]: 14 [Byte1]: 14RX Vref B0= 14, Window Sum 282, worse bit 3, min window 34RX Vref B1= 14, Window Sum 264, worse bit 10, min window 30Set Vref, RX VrefLevel [Byte0]: 15 [Byte1]: 15RX Vref B0= 15, Window Sum 288, worse bit 6, min window 34RX Vref B1= 15, Window Sum 274, worse bit 10, min window 32Set Vref, RX VrefLevel [Byte0]: 16 [Byte1]: 16RX Vref B0= 16, Window Sum 292, worse bit 0, min window 36RX Vref B1= 16, Window Sum 280, worse bit 10, min window 32Set Vref, RX VrefLevel [Byte0]: 17 [Byte1]: 17RX Vref B0= 17, Window Sum 298, worse bit 0, min window 36RX Vref B1= 17, Window Sum 282, worse bit 10, min window 32Set Vref, RX VrefLevel [Byte0]: 18 [Byte1]: 18RX Vref B0= 18, Window Sum 304, worse bit 2, min window 36RX Vref B1= 18, Window Sum 292, worse bit 10, min window 34Set Vref, RX VrefLevel [Byte0]: 19 [Byte1]: 19Set Vref, RX VrefLevel [Byte0]: 20 [Byte1]: 20Set Vref, RX VrefLevel [Byte0]: 21 [Byte1]: 21Final RX Vref Byte 0 = 18 to rank0 to rank1Final RX Vref Byte 1 = 18 to rank0 to rank1===============================================================================Dram Type= 4, Freq= 1600, CH_0, rank 0fsp= 0, odt_onoff= 1, Byte mode= 0, DivMode= 1===============================================================================DQS Delay:DQS0 = 0, DQS1 = 0DQM Delay:DQM0 = 23, DQM1 = 25DQ Delay:DQ0 =24, DQ1 =28, DQ2 =21, DQ3 =26DQ4 =22, DQ5 =25, DQ6 =16, DQ7 =24DQ8 =25, DQ9 =28, DQ10 =24, DQ11 =27DQ12 =23, DQ13 =26, DQ14 =23, DQ15 =26[DualRankRxdatlatCal] RK0: 11, RK1: 0, Final_Datlat 11[Calibration Summary] Freqency 1600CH 0, Rank 0SW Impedance : PASSDUTY Scan : NO KZQ Calibration : PASSJitter Meter : NO KCBT Training : NO KWrite leveling : PASSRX DQS gating : PASSRX DQ/DQS(RDDQC) : PASSTX DQ/DQS : PASSRX DATLAT : PASSRX DQ/DQS(Engine): PASSTX OE : NO KAll Pass.TX_TRACKING: OFF[AUTO] write start address pass, BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x8000000[AUTO] BASE_ADDR : 0x8000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x10000000[AUTO] BASE_ADDR : 0x10000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] Detect DramSize: 0x20000000[AUTO] BASE_ADDR : 0x20000000, OFFSET : 0x3[AUTO] BASE_ADDR : 0x0, OFFSET : 0x3[AUTO] TA2 read check fail, u4err_value = 65535, 3[AUTO] Detect full sizeu4DramSize 0x20000000NOTICE: EMI: Detected DRAM size: 512MB[MEM_TEST] 02: After DFS, before run time config[MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count = 16384, Fail count = 0)[TA2_TEST]=== TA2 HW=== OFFSET:0x200TA2 PAT: 3TA2 Trigger WriteHW channel(0) Rank(0), TA2 pass, pass_cnt:1, err_cnt:0[DramcRunTimeConfig]: ONPHYPLLDPM_CONTROL_AFTERK: ONPER_BANK_REFRESH: OFFREFRESH_OVERHEAD_REDUCTION: ONCMD_PICG_NEW_MODE: OFFTX_TRACKING: OFFRDSEL_TRACKING: OFFDQS Precalculation for DVFS: OFFRX_TRACKING: OFFDDR_HW_GATING DBG: ONDDR_ZQCS_ENABLE: ONRX_PICG_NEW_MODE: ONTX_PICG_NEW_MODE: ONENABLE_RX_DCM_DPHY: ONLOWPOWER_GOLDEN_SETTINGS(DCM): ONDUMMY_READ_FOR_TRACKING: OFF!!! SPM_CONTROL_AFTERK: OFF!!! SPM could not control APHYIMPEDANCE_TRACKING: OFFHW_SAVE_FOR_SR: OFFCLK_FREE_FUN_FOR_DRAMC_PSEL: OFFPA_IMPROVEMENT_FOR_DRAMC_ACTIVE_POWER: OFFRead ODT Tracking: OFFRefresh Rate DeBounce: OFFDFS_NO_QUEUE_FLUSH: OFFDFS_NO_QUEUE_FLUSH_LATENCY_CNT: OFFENABLE_DFS_RUNTIME_MRW: OFFDDR_RESERVE_NEW_MODE: ON=========================[MEM_TEST] 03: After run time config[MEM_TEST] Rank 0 OK.(uiFixedAddr 0x40000000, Pass count = 16384, Fail count = 0)[TA2_TEST]=== TA2 HW=== OFFSET:0x200TA2 Trigger WriteHW channel(0) Rank(0), TA2 pass, pass_cnt:2, err_cnt:0Init_DRAM:2480: init PCDDR4 dram EndEMI: complex real chip dram calibrationVerify pattern 1 (0x00~0xff)...EMI: mem8_base[0] = pattern8 = 0x0Verify pattern 2 (0x00~0xffff)...EMI: mem16_base[0] = pattern16 = 0x0Verify pattern 3 (0x00~0xffffffff)...EMI: mem32_base[0] = pattern32 = 0x0NOTICE: EMI: complex R/W mem test passeddrm_dram_reserved: MTK_DRM_MODE(22000000)NOTICE: SPI_NAND parses attributes from parameter page.NOTICE: SPI_NAND Detected ID 0x0NOTICE: Page size 2048, Block size 131072, size 134217728NOTICE: Initializing NMBM ...NOTICE: Signature found at block 1023 [0x07fe0000]NOTICE: First info table with writecount 0 found in block 960NOTICE: Second info table with writecount 0 found in block 963NOTICE: NMBM has been successfully attached in read-only modeINFO: BL2: Loading image id 3INFO: Loading image id=3 at address 0x42000000INFO: Image id=3 loaded: 0x42000000 - 0x42009061INFO: BL2: Loading image id 5INFO: Loading image id=5 at address 0x42000000INFO: Image id=5 loaded: 0x42000000 - 0x420ae288NOTICE: BL2: Booting BL31INFO: Entry point address = 0x43001000INFO: SPSR = 0x3cdINFO: Total CPU count: 4INFO: MCUSYS: Disable 512KB L2C shared SRAMINFO: check_ver = 0INFO: Secondary bootloader is AArch64INFO: GICv3 without legacy support detected.INFO: ARM GICv3 driver initialized in EL3INFO: Maximum SPI INTID supported: 671INFO: SPMC: Changed to SPMC modeNOTICE: BL31: v2.6(release):82a3fbe10a-dirtyNOTICE: BL31: Built : 16:56:29, Mar 29 2022INFO: [MPU](Region0)sa:0x0300, ea:0x0302INFO: [MPU](Region0)apc0:0x80b6db69, apc1:0x00b6db6dINFO: [MPU](Region1)sa:0x0000, ea:0x0000INFO: [MPU](Region1)apc0:0x00000000, apc1:0x00000000INFO: [MPU](Region2)sa:0x0000, ea:0x0000INFO: [MPU](Region2)apc0:0x00000000, apc1:0x00000000INFO: [MPU](Region3)sa:0x0000, ea:0x0000INFO: [MPU](Region3)apc0:0x00000000, apc1:0x00000000INFO: [DEVAPC] devapc_init doneINFO: BL31: Initializing runtime servicesINFO: BL31: Preparing for EL3 exit to normal worldINFO: Entry point address = 0x41e00000INFO: SPSR = 0x3c9In: serial@11002000Out: serial@11002000Err: serial@11002000Net: eth0: ethernet@15100000 *** U-Boot Boot Menu *** 1. Startup system (Default) 2. Startup firmware0 3. Startup firmware1 4. Upgrade firmware 5. Upgrade ATF BL2 6. Upgrade ATF FIP 7. Upgrade single image 8. Load image 0. U-Boot console Press UP/DOWN to move, ENTER to select, ESC/CTRL+C to quitdetect button reset released!Reading from 0x0 to 0x5f7fdd8c, size 0x4 ... OKBoot failure detected on both systemsReading from 0x0 to 0x5f7fdd8c, size 0x4 ... OKSaving Environment to MTD... Erasing on MTD device 'nmbm0'... OKWriting to MTD device 'nmbm0'... OKOKBooting System 0ubi0: attaching mtd9ubi0: scanning is finishedubi0: attached mtd9 (name "ubi", size 110 MiB)ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytesubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096ubi0: good PEBs: 880, bad PEBs: 0, corrupted PEBs: 0ubi0: user volume: 3, internal volumes: 1, max. volumes count: 128ubi0: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 0ubi0: available PEBs: 2, total reserved PEBs: 878, PEBs reserved for bad PEB handling: 19Reading from volume 'kernel' to 0x46000000, size 0x0 ... OK## Loading kernel from FIT Image at 46000000 ... Using 'config-1' configuration Trying 'kernel-1' kernel subimage Description: ARM64 OpenWrt Linux-5.15.79 Type: Kernel Image Compression: lzma compressed Data Start: 0x460000e8 Data Size: 3928604 Bytes = 3.7 MiB Architecture: AArch64 OS: Linux Load Address: 0x48000000 Entry Point: 0x48000000 Hash algo: crc32 Hash value: 77db497a Hash algo: sha1 Hash value: 474cb45f88e7db5de6f013a153b99eaaf22cf8ce Verifying Hash Integrity ... crc32+ sha1+ OK## Loading fdt from FIT Image at 46000000 ... Using 'config-1' configuration Trying 'fdt-1' fdt subimage Description: ARM64 OpenWrt xiaomi_redmi-router-ax6000 device tree blob Type: Flat Device Tree Compression: uncompressed Data Start: 0x463bf450 Data Size: 32768 Bytes = 32 KiB Architecture: AArch64 Hash algo: crc32 Hash value: afb34518 Hash algo: sha1 Hash value: 33475bc38fa9d8c3b69367220d36fd74a2cd5e21 Verifying Hash Integrity ... crc32+ sha1+ OK Booting using the fdt blob at 0x463bf450 Uncompressing Kernel Image Loading Device Tree to 000000005f7ee000, end 000000005f7f8fff ... OKStarting kernel ...[ 0.000000] Booting Linux on physical CPU 0x0000000000 [0x410fd034][ 0.000000] Linux version 5.15.79 (builder@buildhost) (aarch64-openwrt-linux-musl-gcc (OpenWrt GCC 11.3.0 r21312-4c67d1e066) 11.3.0, GNU ld (GNU Binutils) 2.37) #0 SMP Thu Nov 17 01:55:55 2022[ 0.000000] Machine model: Xiaomi Redmi Router AX6000[ 0.000000] Zone ranges:[ 0.000000] DMA [mem 0x0000000040000000-0x000000005fffffff][ 0.000000] DMA32 empty[ 0.000000] Normal empty[ 0.000000] Movable zone start for each node[ 0.000000] Early memory node ranges[ 0.000000] node 0: [mem 0x0000000040000000-0x0000000042ffffff][ 0.000000] node 0: [mem 0x0000000043000000-0x000000004302ffff][ 0.000000] node 0: [mem 0x0000000043030000-0x000000004fbfffff][ 0.000000] node 0: [mem 0x000000004fc00000-0x000000004fcfffff][ 0.000000] node 0: [mem 0x000000004fd00000-0x000000005fffffff][ 0.000000] Initmem setup node 0 [mem 0x0000000040000000-0x000000005fffffff][ 0.000000] psci: probing for conduit method from DT.[ 0.000000] psci: PSCIv1.1 detected in firmware.[ 0.000000] psci: Using standard PSCI v0.2 function IDs[ 0.000000] psci: MIGRATE_INFO_TYPE not supported.[ 0.000000] psci: SMC Calling Convention v1.2[ 0.000000] percpu: Embedded 17 pages/cpu s30040 r8192 d31400 u69632[ 0.000000] pcpu-alloc: s30040 r8192 d31400 u69632 alloc=17*4096[ 0.000000] pcpu-alloc: [0] 0 [0] 1 [0] 2 [0] 3[ 0.000000] Detected VIPT I-cache on CPU0[ 0.000000] CPU features: detected: GIC system register CPU interface[ 0.000000] CPU features: kernel page table isolation disabled by kernel configuration[ 0.000000] Built 1 zonelists, mobility grouping on. Total pages: 129024[ 0.000000] Kernel command line: console=ttyS0,115200n1 loglevel=8 firmware=0 uart_en=1[ 0.000000] Unknown kernel command line parameters "firmware=0 uart_en=1", will be passed to user space.[ 0.000000] Dentry cache hash table entries: 65536 (order: 7, 524288 bytes, linear)[ 0.000000] Inode-cache hash table entries: 32768 (order: 6, 262144 bytes, linear)[ 0.000000] mem auto-init: stack:off, heap alloc:off, heap free:off[ 0.000000] Memory: 500392K/524288K available (8320K kernel code, 898K rwdata, 2176K rodata, 384K init, 300K bss, 23896K reserved, 0K cma-reserved)[ 0.000000] SLUB: HWalign=64, Order=0-3, MinObjects=0, CPUs=4, Nodes=1[ 0.000000] rcu: Hierarchical RCU implementation.[ 0.000000] Tracing variant of Tasks RCU enabled.[ 0.000000] rcu: RCU calculated value of scheduler-enlistment delay is 10 jiffies.[ 0.000000] NR_IRQS: 64, nr_irqs: 64, preallocated irqs: 0[ 0.000000] GICv3: GIC: Using split EOI/Deactivate mode[ 0.000000] GICv3: 640 SPIs implemented[ 0.000000] GICv3: 0 Extended SPIs implemented[ 0.000000] GICv3: Distributor has no Range Selector support[ 0.000000] Root IRQ handler: gic_handle_irq[ 0.000000] GICv3: 16 PPIs implemented[ 0.000000] GICv3: CPU0: found redistributor 0 region 0:0x000000000c080000[ 0.000000] arch_timer: cp15 timer(s) running at 13.00MHz (phys).[ 0.000000] clocksource: arch_sys_counter: mask: 0xffffffffffffff max_cycles: 0x2ff89eacb, max_idle_ns: 440795202429 ns[ 0.000000] sched_clock: 56 bits at 13MHz, resolution 76ns, wraps every 4398046511101ns[ 0.000126] Calibrating delay loop (skipped), value calculated using timer frequency.. 26.00 BogoMIPS (lpj=130000)[ 0.000135] pid_max: default: 32768 minimum: 301[ 0.000210] Mount-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)[ 0.000218] Mountpoint-cache hash table entries: 1024 (order: 1, 8192 bytes, linear)[ 0.001093] rcu: Hierarchical SRCU implementation.[ 0.001170] dyndbg: Ignore empty _ddebug table in a CONFIG_DYNAMIC_DEBUG_CORE build[ 0.001351] smp: Bringing up secondary CPUs ...[ 0.001599] Detected VIPT I-cache on CPU1[ 0.001621] GICv3: CPU1: found redistributor 1 region 0:0x000000000c0a0000[ 0.001646] CPU1: Booted secondary processor 0x0000000001 [0x410fd034][ 0.001906] Detected VIPT I-cache on CPU2[ 0.001918] GICv3: CPU2: found redistributor 2 region 0:0x000000000c0c0000[ 0.001929] CPU2: Booted secondary processor 0x0000000002 [0x410fd034][ 0.002154] Detected VIPT I-cache on CPU3[ 0.002164] GICv3: CPU3: found redistributor 3 region 0:0x000000000c0e0000[ 0.002175] CPU3: Booted secondary processor 0x0000000003 [0x410fd034][ 0.002201] smp: Brought up 1 node, 4 CPUs[ 0.002214] SMP: Total of 4 processors activated.[ 0.002217] CPU features: detected: 32-bit EL0 Support[ 0.002220] CPU features: detected: CRC32 instructions[ 0.002295] CPU: All CPU(s) started at EL2[ 0.002306] alternatives: patching kernel code[ 0.004242] clocksource: jiffies: mask: 0xffffffff max_cycles: 0xffffffff, max_idle_ns: 19112604462750000 ns[ 0.004263] futex hash table entries: 1024 (order: 4, 65536 bytes, linear)[ 0.004367] pinctrl core: initialized pinctrl subsystem[ 0.004941] NET: Registered PF_NETLINK/PF_ROUTE protocol family[ 0.005154] DMA: preallocated 128 KiB GFP_KERNEL pool for atomic allocations[ 0.005174] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA pool for atomic allocations[ 0.005194] DMA: preallocated 128 KiB GFP_KERNEL|GFP_DMA32 pool for atomic allocations[ 0.005421] thermal_sys: Registered thermal governor 'fair_share'[ 0.005424] thermal_sys: Registered thermal governor 'bang_bang'[ 0.005427] thermal_sys: Registered thermal governor 'step_wise'[ 0.005430] thermal_sys: Registered thermal governor 'user_space'[ 0.005604] ASID allocator initialised with 65536 entries[ 0.005850] pstore: Registered ramoops as persistent store backend[ 0.005854] ramoops: using 0x10000@0x42ff0000, ecc: 0[ 0.012267] cryptd: max_cpu_qlen set to 1000[ 0.013583] SCSI subsystem initialized[ 0.013656] libata version 3.00 loaded.[ 0.014437] clocksource: Switched to clocksource arch_sys_counter[ 0.014822] NET: Registered PF_INET protocol family[ 0.014895] IP idents hash table entries: 8192 (order: 4, 65536 bytes, linear)[ 0.015193] tcp_listen_portaddr_hash hash table entries: 256 (order: 0, 4096 bytes, linear)[ 0.015206] Table-perturb hash table entries: 65536 (order: 6, 262144 bytes, linear)[ 0.015212] TCP established hash table entries: 4096 (order: 3, 32768 bytes, linear)[ 0.015233] TCP bind hash table entries: 4096 (order: 4, 65536 bytes, linear)[ 0.015275] TCP: Hash tables configured (established 4096 bind 4096)[ 0.015323] UDP hash table entries: 256 (order: 1, 8192 bytes, linear)[ 0.015336] UDP-Lite hash table entries: 256 (order: 1, 8192 bytes, linear)[ 0.015412] NET: Registered PF_UNIX/PF_LOCAL protocol family[ 0.015432] PCI: CLS 0 bytes, default 64[ 0.017154] workingset: timestamp_bits=46 max_order=17 bucket_order=0[ 0.019193] squashfs: version 4.0 (2009/01/31) Phillip Lougher[ 0.019207] jffs2: version 2.2 (NAND) (SUMMARY) (LZMA) (RTIME) (CMODE_PRIORITY) (c) 2001-2006 Red Hat, Inc.[ 0.041322] Block layer SCSI generic (bsg) driver version 0.4 loaded (major 251)[ 0.043862] Serial: 8250/16550 driver, 16 ports, IRQ sharing enabled[ 0.045479] printk: console [ttyS0] disabled[ 0.065646] 11002000.serial: ttyS0 at MMIO 0x11002000 (irq = 121, base_baud = 2500000) is a ST16650V2[ 0.716933] printk: console [ttyS0] enabled[ 0.721673] mtk_rng 1020f000.trng: registered RNG driver[ 0.721731] hwrng: no data available[ 0.727181] cacheinfo: Unable to detect cache hierarchy for CPU 0[ 0.738516] loop: module loaded[ 0.741665] Loading iSCSI transport class v2.0-870.[ 0.747993] spi-nand spi0.0: ESMT SPI NAND was found.[ 0.753041] spi-nand spi0.0: 128 MiB, block size: 128 KiB, page size: 2048, OOB size: 64[ 0.762394] Signature found at block 1023 [0x07fe0000][ 0.767535] NMBM management region starts at block 960 [0x07800000][ 0.778211] First info table with writecount 0 found in block 960[ 0.797556] Second info table with writecount 0 found in block 963[ 0.803720] NMBM has been successfully attached[ 0.808443] 8 fixed-partitions partitions found on MTD device spi0.0[ 0.815019] Creating 8 MTD partitions on "spi0.0":[ 0.819794] 0x000000000000-0x000000100000 : "BL2"[ 0.825649] 0x000000100000-0x000000140000 : "Nvram"[ 0.830965] 0x000000140000-0x000000180000 : "Bdata"[ 0.836303] 0x000000180000-0x000000380000 : "Factory"[ 0.843230] 0x000000380000-0x000000580000 : "FIP"[ 0.849808] 0x000000580000-0x0000005c0000 : "crash"[ 0.855150] 0x0000005c0000-0x000000600000 : "crash_log"[ 0.860833] 0x000000600000-0x000007400000 : "ubi"[ 0.973061] mtk_soc_eth 15100000.ethernet eth0: mediatek frame engine at 0xffffffc009600000, irq 126[ 0.982574] i2c_dev: i2c /dev entries driver[ 0.987726] mtk-wdt 1001c000.watchdog: Watchdog enabled (timeout=31 sec, nowayout=0)[ 0.996034] NET: Registered PF_INET6 protocol family[ 1.001532] Segment Routing with IPv6[ 1.005214] In-situ OAM (IOAM) with IPv6[ 1.009148] NET: Registered PF_PACKET protocol family[ 1.014205] bridge: filtering via arp/ip/ip6tables is no longer available by default. Update your scripts to load br_netfilter if you need this.[ 1.027183] 8021q: 802.1Q VLAN Support v1.8[ 1.032138] pstore: Using crash dump compression: deflate[ 1.080941] mt7530 mdio-bus:1f: configuring for fixed/2500base-x link mode[ 1.088262] mt7530 mdio-bus:1f: Link is Up - 2.5Gbps/Full - flow control rx/tx[ 1.097860] mt7530 mdio-bus:1f lan4 (uninitialized): PHY [mt7530-0:01] driver [MediaTek MT7531 PHY] (irq=134)[ 1.117707] mt7530 mdio-bus:1f lan3 (uninitialized): PHY [mt7530-0:02] driver [MediaTek MT7531 PHY] (irq=135)[ 1.137254] mt7530 mdio-bus:1f lan2 (uninitialized): PHY [mt7530-0:03] driver [MediaTek MT7531 PHY] (irq=136)[ 1.156806] mt7530 mdio-bus:1f wan (uninitialized): PHY [mt7530-0:04] driver [MediaTek MT7531 PHY] (irq=137)[ 1.167600] DSA: tree 0 setup[ 1.171968] UBI: auto-attach mtd7[ 1.175289] ubi0: default fastmap pool size: 40[ 1.179802] ubi0: default fastmap WL pool size: 20[ 1.184579] ubi0: attaching mtd7[ 3.085127] ubi0: scanning is finished[ 3.113010] ubi0: attached mtd7 (name "ubi", size 110 MiB)[ 3.118500] ubi0: PEB size: 131072 bytes (128 KiB), LEB size: 126976 bytes[ 3.125356] ubi0: min./max. I/O unit sizes: 2048/2048, sub-page size 2048[ 3.132123] ubi0: VID header offset: 2048 (aligned 2048), data offset: 4096[ 3.139064] ubi0: good PEBs: 880, bad PEBs: 0, corrupted PEBs: 0[ 3.145053] ubi0: user volume: 3, internal volumes: 1, max. volumes count: 128[ 3.152252] ubi0: max/mean erase counter: 2/1, WL threshold: 4096, image sequence number: 0[ 3.160581] ubi0: available PEBs: 0, total reserved PEBs: 880, PEBs reserved for bad PEB handling: 19[ 3.169782] ubi0: background thread "ubi_bgt0d" started, PID 450[ 3.173607] block ubiblock0_1: created from ubi0:1(rootfs)[ 3.181244] ubiblock: device ubiblock0_1 (rootfs) set to be root filesystem[ 3.205970] VFS: Mounted root (squashfs filesystem) readonly on device 254:0.[ 3.213224] Freeing unused kernel memory: 384K[ 3.294469] Run /sbin/init as init process[ 3.298548] with arguments:[ 3.301499] /sbin/init[ 3.304190] with environment:[ 3.307319] HOME=/[ 3.309663] TERM=linux[ 3.312354] firmware=0[ 3.315047] uart_en=1[ 3.708523] init: Console is alive[ 3.712025] init: - watchdog -[ 3.994467] random: crng init done[ 4.466984] kmodloader: loading kernel modules from /etc/modules-boot.d/*[ 4.564661] kmodloader: done loading kernel modules from /etc/modules-boot.d/*[ 4.582067] init: - preinit -[ 5.044790] mtk_soc_eth 15100000.ethernet eth0: configuring for fixed/2500base-x link mode[ 5.053216] mtk_soc_eth 15100000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/txPress the [f] key and hit [enter] to enter failsafe modePress the [1], [2], [3] or [4] key and hit [enter] to select the debug level[ 7.175811] UBIFS (ubi0:2): default file-system created[ 7.183186] UBIFS (ubi0:2): Mounting in unauthenticated mode[ 7.188910] UBIFS (ubi0:2): background thread "ubifs_bgt0_2" started, PID 524[ 7.398097] UBIFS (ubi0:2): UBIFS: mounted UBI device 0, volume 2, name "rootfs_data"[ 7.405919] UBIFS (ubi0:2): LEB size: 126976 bytes (124 KiB), min./max. I/O unit sizes: 2048 bytes/2048 bytes[ 7.415810] UBIFS (ubi0:2): FS size: 98152448 bytes (93 MiB, 773 LEBs), max 784 LEBs, journal size 4952064 bytes (4 MiB, 39 LEBs)[ 7.427435] UBIFS (ubi0:2): reserved for root: 4635982 bytes (4527 KiB)[ 7.434029] UBIFS (ubi0:2): media format: w5/r0 (latest is w5/r0), UUID D7F77B4C-E05E-43D0-83D5-060DBE8BA542, small LPT model[ 7.449300] mount_root: overlay filesystem has not been fully initialized yet[ 7.456578] mount_root: switching to ubifs overlay[ 7.467427] overlayfs: null uuid detected in lower fs '/', falling back to xino=off,index=off,nfs_export=off.[ 7.478210] urandom-seed: Seed file not found (/etc/urandom.seed)[ 7.570066] procd: - early -[ 7.572987] procd: - watchdog -[ 8.146008] procd: - watchdog -[ 8.237538] procd: - ubus -[ 8.326938] procd: - init -Please press Enter to activate this console.[ 8.709398] urngd: v1.0.2 started.[ 8.724563] kmodloader: loading kernel modules from /etc/modules.d/*[ 8.824129] crypto-safexcel 10320000.crypto: EIP97:230(0,1,4,4)-HIA:270(0,5,5),PE:150/433(alg:7fcdfc00)/0/0/0[ 8.838059] Loading modules backported from Linux version v5.15.74-0-ga3f2f5ac9d61[ 8.845642] Backport generated by backports.git v5.15.74-1-0-ge2d78967[ 9.196948] mt7986-wmac 18000000.wmac: HW/SW Version: 0x8a108a10, Build Time: 20220113162543a[ 9.196948][ 9.513944] mt7986-wmac 18000000.wmac: WM Firmware Version: ____000000, Build Time: 20220113162641[ 9.659522] mt7986-wmac 18000000.wmac: WA Firmware Version: DEV_000000, Build Time: 20220113163034[ 13.556669] PPP generic driver version 2.4.2[ 13.561564] NET: Registered PF_PPPOX protocol family[ 13.569069] kmodloader: done loading kernel modules from /etc/modules.d/*[ 13.761641] mtdblock: MTD device 'Bdata' is NAND, please consider using UBI block devices instead.[ 18.773029] mtk_soc_eth 15100000.ethernet eth0: Link is Down[ 18.784481] mtk_soc_eth 15100000.ethernet eth0: configuring for fixed/2500base-x link mode[ 18.792906] mtk_soc_eth 15100000.ethernet eth0: Link is Up - 2.5Gbps/Full - flow control rx/tx[ 18.793978] mt7530 mdio-bus:1f lan2: configuring for phy/gmii link mode[ 18.810891] br-lan: port 1(lan2) entered blocking state[ 18.816111] br-lan: port 1(lan2) entered disabled state[ 18.822742] device lan2 entered promiscuous mode[ 18.827431] device eth0 entered promiscuous mode[ 18.834158] IPv6: ADDRCONF(NETDEV_CHANGE): eth0: link becomes ready[ 18.846195] mt7530 mdio-bus:1f lan3: configuring for phy/gmii link mode[ 18.855850] br-lan: port 2(lan3) entered blocking state[ 18.857557] mt7530 mdio-bus:1f lan3: Link is Up - 100Mbps/Full - flow control rx/tx[ 18.861079] br-lan: port 2(lan3) entered disabled state[ 18.875675] device lan3 entered promiscuous mode[ 18.882373] br-lan: port 2(lan3) entered blocking state[ 18.887660] br-lan: port 2(lan3) entered forwarding state[ 18.893203] IPv6: ADDRCONF(NETDEV_CHANGE): br-lan: link becomes ready[ 18.902519] mt7530 mdio-bus:1f lan4: configuring for phy/gmii link mode[ 18.911914] br-lan: port 3(lan4) entered blocking state[ 18.917177] br-lan: port 3(lan4) entered disabled state[ 18.924263] device lan4 entered promiscuous mode[ 18.934140] mt7530 mdio-bus:1f wan: configuring for phy/gmii link mode[ 18.946530] mt7530 mdio-bus:1f wan: Link is Up - 1Gbps/Full - flow control off[ 18.953779] IPv6: ADDRCONF(NETDEV_CHANGE): wan: link becomes ready

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[OpenWrt Wiki] Xiaomi Redmi AX6000 (2024)

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